▍1. LCD例程 altera官方Verilog代码 详尽简单实用
LCD例程 altera官方Verilog代码 详尽简单实用-LCD routines altera official Verilog code is simple and practical details
LCD例程 altera官方Verilog代码 详尽简单实用-LCD routines altera official Verilog code is simple and practical details
VHDL写的PWM发生器,仿真通过,波形基本完美,可以用于直流电机的控制-PWM generator written in VHDL, simulation is passed, the basic waveform perfect, can be used for DC motor control
对信号实现2FSK调制,2FSK就是用数字信号去调制载波的频率(移频键控),是信息传输中使用得较早的一种调制方式。它的主要优点是:实现起来较容易;抗噪声与抗衰减的性能较好;在中低速数据传输中得到广泛的应用。-the performance of 2FSK based on verilog
Viterbi译码器的编解码器的设计 用Verilog实现-Viterbi decoder。Verilog
altera的关于对数计算的IP core。-altera calculated on the logarithm of the IP core.
A counter that starts from 0 and increments mod 16 on each rising edge of the clock
几个fpga竞赛的设计例-Several Example FPGA design contest
VHDL语言设计的秒表,实现计时功能,实现报时功能,并且通过硬件实验。-VHDL language design stopwatch, timer function of the realization, the realization of time functions, and through hardware experiments.
这个文件中是UltraEdit的一些格式化文件说明 由于原来的 UltraEdit 不支持 HDL 语言的格式化显示,把文件解压得到的 wordfile.txt替换其安装目录下的 wordfile.txt 文件即可-This document is formatted UltraEdit document describes some of the original UltraEdit as a result of HDL does not support formatting language shows that the document received decompression wordfile.txt replace its installation directory under the document can wordfile.txt
adc0809用FPGA控制的采样非常好用的实例 自己看书后终结的-ADC0809
有关视频压缩的IPCore,希望对大家有用-Video Compression IPCore
本人编写的定点除法器,开发软件为XILINX的ISE6.2,通过PAR仿真.-I prepared for the sentinel division, the development of software for the ISE6.2 Xilinx, PAR through simulation.
FPGA实现的LCD接口,VHDL编程,FPGA芯片为ALtera公司的EP2c35-FPGA realization of the LCD interface, VHDL programming, FPGA chips for Altera
基_2FFT算法的FPGA设计与实现,适合做fpga的工程技术人员参考及设计-_2FFT Algorithm-based FPGA Design and Implementation for fpga to do engineering and design reference
色彩空间转换硬件实现,用于图像处理,编码,解码部分-Color space conversion hardware for image processing, encoding, decoding part of the
一个使用VHDL设计的具有强大功能的32位CPU,这个文件包含了在Altera公司的ep1c20 FPGA的位码文件和配置文件,可以直接下载使用!-A VHDL design with the use of powerful 32-bit CPU, this document contains Altera Corporation in the ep1c20 FPGA code and configuration files, you can direct download!
直流电机控制器,属于精品vhdl源码,可在eda仿真工具上仿真实现-DC motor controller is excellent VHDL source code can be sown in simulation tools Simulation