▍1. 四人抢答器,已通过编译,仿真,包括抢答识别、计分、计时、数字显示等功能。...
四人抢答器,已通过编译,仿真,包括抢答识别、计分、计时、数字显示等功能。-Four Responder, has passed the compilation, simulation, including the answer in his identification, scoring, timing and digital display.
四人抢答器,已通过编译,仿真,包括抢答识别、计分、计时、数字显示等功能。-Four Responder, has passed the compilation, simulation, including the answer in his identification, scoring, timing and digital display.
verilog例子资源,对于初学者很有帮助。-verilog examples of resources are very useful for beginners.
用VHDL语言仿真歌曲刘德华的《月老》 -Simulation using VHDL language songs Andy Lau
Spartan 3 Digilent Demo:This demo drives the perphrials on the Spartan 3 board. This drives a simple pattern to the VGA port, connects the switches to the LEDs, buttons to each anode of the seven segment decoder. The seven segment decoder has a simple counter running on it, and when SW0 is in the up position the seven segment decoder will display scan codes from the PS2 port. This demo how ever does not drive the RS-232 port or the memory. This is a simple design done entirely VHDL not microblaze.
二进制除法器,采用移位相减的方法实现,位数可调-The source code of a divider
四位动态数码管显示数字时钟的分位和秒位。工具:Quartus ii 6.0 语言:VHDL-4 shows the number of dynamic digital tube digital clock and seconds bit. Tools: Quartus ii 6.0 Language: VHDL
vhdl,序列信号发生器,发出11101010,可更改为任意序列-vhdl, sequence signal generator, issued 11.10101 million, you can change an arbitrary sequence of
使用VHDL实现锁相环,是个学习VHDL的好例子,与众分享-PLL using VHDL, VHDL is learning a good example, sharing with the public
dp_xiliux 的 CPLD Verilog设计实验,流水灯演示.代码测试通过. -dp_xiliux the CPLD Verilog design experiments, water lamp demonstration. code test.
一个用VerilogHDL语言编写的8X8的乘法器-a Verilog HDL language used in the preparation of the multiplier 8X8
适合DE2板,能够在板子上的液晶显示器上实现时钟功能。-for Dictyophora board, in the way of achieving LCD clock function.
通过UART从PC主机读取图片数据,并完成图片在VGA显示器上的显示-through UART from the host PC to read image data, and complete picture of the VGA display on the show
这种设计允许您实验用脉冲宽度调制 (PWM) 由 PicoBlaze 处理器执行。作为提供,设计将允许您向控制 12 PWM 通道 ; 8 个通道控制板上的 8 个 Led 的强度和剩余的 4 通道上设有连接器 "J4" 你在哪 可以观察你应该对示波器的访问。你可能也喜欢尝试简单电阻电容 (RC) 平滑电路连接到接头引脚可创建附加数字信号到模拟 (D/A) 转换器或尝试控制马达通过驱动晶体管。 脉宽调制实现了 1 千赫和 8 位分辨率 (256 个步骤) 的脉冲重复频率 (PRF)。为每个 LED 或 "J4" 输出占空比可以独立使用简单的命令输入一个简单的终端程序在您的 PC 上设置 (超级终端是理想的)。
本程序实现两个整数平方和相加并且输出结果-the program two integers and the sum of squared output
veilog 代码 用户可以直接调用,作为底层模块。同时已经编译成功,可以作为基本单元库。-veilog code user can derict use it for the base mode.
一种RISC结构8位微控制器的设计与实现-The structure of a RISC micro-controller" s 8 Design and Implementation
用VHDL语言编写,在MAXPLUS2下调试通过-VHDL language, debug through MAXPLUS2
该PPT是一个内部教学资料,想学习EDA技术的朋友可以看看这个教学资料。-The PPT is an internal teaching materials, want to learn EDA technologies friends can look at the teaching and learning materials.