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spi_slave
FPGA实现SPI接口的从机功能,接收和发送全双工运行,接收到的数据以八位LED灯显示(FPGA to achieve the SPI interface the machine function, receive and send full-duplex operation, the received data to eight LED lights)
- 2021-01-07 19:28:52下载
- 积分:1
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jpeg_fpga
基于FPGA的JPEG解码,对开发图片解码的人有用。(FPGA-based JPEG decoding, the development of image decoding useful.)
- 2014-02-24 09:19:22下载
- 积分:1
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GMSK调制基带眼图仿真源代码
GMSK调制基带眼图仿真源代码,基于MATLAB(GMSK modulation baseband eye diagram simulation source code, based on MATLAB)
- 2020-06-28 11:40:01下载
- 积分:1
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Frame-synchronizer-
原创,帧同步器的Verilog代码,在FPGA上验证实现过,无误。作为通信系统帧传输的仿真,有限状态机同步态和失步态的切换仿真。(Original Verilog code for frame synchronization, verify the implementation on the FPGA, and correct. Frame transmission as the communication system simulation, finite state machine synchronous state and the loss of the switching simulation of gait.)
- 2012-04-01 19:38:54下载
- 积分:1
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ht82v38 线性ccd AD转换fpga程序
ht82v38 线性ccd 16位 AD转换fpga程序VHDLHT82V26(38)是Holtek(隶属台湾盛群半导体股份有限公司)出品的专用于CCD/CIS模拟信号的处理器。当然,其也可做为通用ADC芯片使用。 HT82V38采用3.3V,5V工作电源,采用三个信道的结构(3个ADC输入通道,分别为R、G、B通道),可提供一个、两个或三个信道的操作模式供用户选择,其A/D转换器精度为16位(16bit),转换速率最高达到30MSPS。
- 2022-03-09 21:51:37下载
- 积分:1
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DDR3读写测试
MIG IP控制DDR3读写测试,于MIG IP核用户接口时序较复杂,这里给出扩展接口模块用于进一步简化接口时序。(MIG IP controls DDR3 reading and writing tests, and the time sequence of MIG IP kernel user interface is more complex.)
- 2018-03-28 16:01:36下载
- 积分:1
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costas
载波同步,costas环,基于Verilog的载波同步环(Carrier synchronization, costas ring, based on Verilog carrier synchronization ring
)
- 2021-03-05 13:09:31下载
- 积分:1
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VGA
VHDL语言实现VGA的显示彩条横条九宫格的功能。(VGA display color of the VHDL language bar Jiugongge function.)
- 2013-05-07 10:04:10下载
- 积分:1
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04_uart_test
说明: 基于FPGA的串口发送和接收,使用的verlilog语言(Using Verilog serial port program, send and receive.)
- 2020-10-13 10:33:10下载
- 积分:1
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encode
(7 4)汉明编码源程序,简单实用,可供大家下载,如有问题,望大家多多包含!((74) Hamming code source, simple and practical, available for everyone to download and, if problems, hope you lot included!)
- 2010-01-13 11:37:25下载
- 积分:1