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奇数奇偶校验器使用VHDL的有限状态机
An odd parity checker as an FSM using VHDL
- 2022-02-24 23:42:29下载
- 积分：1
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bootstrap_ace_v1.3.2
多年项目经验测试文档测试文档，重要保存重要保存重要保存重要保存重要保存重要保存(Years of project experience testing document testing, it is important to save save save important important important important to save save save important)
- 2016-03-05 15:46:27下载
- 积分：1
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数码管显示有片选 模块
四输入，与其他模块相连即可使用
数码管显示有片选 模块
四输入，与其他模块相连即可使用-digital film of the election showed that four input modules, and other modules can be linked to the use of
- 2022-08-24 22:54:51下载
- 积分：1
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z_max_spwm
Z源逆变器简单升压模拟仿真。调制方式为SPWM，通过设置三角波幅值和比较电压，即可调节输出电压。(Z-source inverter simple step-up simulation. Modulation mode SPWM, by setting the the triangle amplitude and the comparison voltage to regulate the output voltage.)
- 2020-11-02 19:09:53下载
- 积分：1
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1路视频光端机的发射端，VHDL源码，使用全FPGA芯片的硬件，内建成帧、时钟、SERDES...
1路视频光端机的发射端，VHDL源码，使用全FPGA芯片的硬件，内建成帧、时钟、SERDES-The launch of a video PDH client, VHDL source code, use the whole FPGA chip hardware, built-in framing, clock, SERDES
- 2022-08-08 19:22:01下载
- 积分：1
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GW48
vhdl语言试验箱GW48的各种模式引脚图。。(vhdl language the various modes of chamber GW48 pin map. .)
- 2010-01-20 13:20:28下载
- 积分：1
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Traffic lights controller VHDL design, can be controlled by traffic lights at th...
交通灯控制器的VHDL设计,能控制十字路口的红绿灯转换,通过目标芯片EPF10KLC84-4验证-Traffic lights controller VHDL design, can be controlled by traffic lights at the crossroads of the conversion, through the target chips EPF10KLC84-4 verification
- 2023-02-14 06:35:03下载
- 积分：1
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sram 读写小程序，用verilog编写的，请各位高手指教
sram 读写小程序，用verilog编写的，请各位高手指教-SRAM read and write small programs using Verilog prepared, please enlighten you master
- 2022-07-03 11:53:36下载
- 积分：1
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ip核的FFTverilog源代码，说明不是很具体
ip核的FFTverilog源代码，说明不是很具体-ip nuclear FFTverilog source code, that is not very specific
- 2022-04-09 08:51:42下载
- 积分：1
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FPGA控制AD7321的模块
FPGA控制AD7321的模块，是本人亲自试验过的。有Verilog源码，和简单文档(Fpga control module of ad 7321, is I personally tested. Verilog source code, and simple documentation)
- 2018-01-31 20:04:27下载
- 积分：1
