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实用的程序代码，希望对大家有用，已经调试通过
实用的程序代码，希望对大家有用，已经调试通过-Practical program code, in the hope that useful to everybody, has debugging through
- 2023-05-31 04:55:02下载
- 积分：1
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clo
实现时分秒的计数和校正实现时分秒的计数和校正(Realized and correction of minutes and seconds count)
- 2009-12-21 22:52:39下载
- 积分：1
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coverlater
本程序是在Quartus7.2环境下编译的一个简单的(2,1,3)卷积码，能够成功地编译和仿真。(This procedure is in circumstances Quartus7.2 compile a simple (2,1,3) convolutional code, can successfully compile and simulation.)
- 2021-03-13 20:49:24下载
- 积分：1
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FFT处理器，FPGA的设计，适用于信号处理技术参考…
FFT处理器的FPGA设计方法，适合做信号处理的技术人员参考，用FPGA实现-FFT processor, FPGA design, suitable for signal processing technology for reference, using FPGA to achieve
- 2022-12-05 04:55:03下载
- 积分：1
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verilog_DATA_displays
使用verilog语言，滚动显示“verilog”字符串程序代码及相关说明(Using verilog language, scrolling display " verilog" string code and instructions)
- 2014-01-16 10:49:55下载
- 积分：1
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alu2
verilog alu 8bit for engineers
- 2011-05-26 11:32:21下载
- 积分：1
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Verilog语法
说明： Verilog语法教程，适合初学者，详细(Verilog instruction book)
- 2019-05-04 16:07:18下载
- 积分：1
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sdram
数字ic设计，二级缓存，格雷码，深度256，(Digital IC design, two level cache, gray code, depth 256.)
- 2018-10-31 10:40:37下载
- 积分：1
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VHDL手册很不错，适合硬件描述语言指南
VHDL handbook is very nice and suitable guide to HVDL language
- 2022-04-17 19:38:41下载
- 积分：1
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SystemOfTaxiFeeBasedOnVerilogHDL
摘 要：以上海地区的出租车计费器为例，利用Verilog HDL语言设计了出租车计费器，使其具有时间
显示、计费以及模拟出租车启动、停止、复位等功能，并设置了动态扫描电路显示车费和对应时间，显示
了硬件描述语言Verilog—HDL设计数字逻辑电路的优越性。源程序经MAX+PLUS Ⅱ软件调试、优
化，下载到EPF1OK10TC144—3芯片中，可应用于实际的出租车收费系统。
关键词：Verilog HDL；电子自动化设计；硬件描述语言；MAX+PLUSⅡ(Abstract: Shanghai taxi meter as an example, the use of Verilog HDL language designed taxi meter so that it will have the time display, billing, as well as analog taxis to start, stop, reset and other functions, and set up a dynamic scanning circuit shows that the fare and the corresponding time, shows the hardware description language Verilog-HDL design of the superiority of digital logic circuits. Source by MAX+ PLUS Ⅱ software debugging, optimization, downloaded to EPF1OK10TC144-3 chip, can be applied to the actual taxi fare collection system. Keywords: Verilog HDL electronic design automation hardware description language MAX+ PLUS Ⅱ)
- 2007-09-11 10:52:52下载
- 积分：1
