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marquee
Multisim11下8051跑马灯仿真。(The 8051 Marquee under Multisim11 simulation.)
- 2012-11-07 23:12:12下载
- 积分：1
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阶梯波程序
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY ladder IS
PORT(clk,reset:IN STD_LOGIC;
- 2023-07-31 13:05:03下载
- 积分：1
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利用VHDL实现CPLD（EPM240T100C5）的串口发送程序
利用VHDL实现CPLD（EPM240T100C5）的串口发送程序-Using VHDL realize CPLD (EPM240T100C5) Serial sending procedures
- 2022-12-18 02:35:03下载
- 积分：1
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Desktop
qpsk的fpga实现，包含调制和解调部分，使用verilog语言(FPGA implementation of QPSK)
- 2019-03-16 02:52:26下载
- 积分：1
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ffirr_166i
fir低通滤波器 用于dspbuilder pll：25nss data 400khz sin 10.8khz 已通过测试。
(fir low pass filter for dspbuilder pll: 25nss data 400khz sin 10.8khz has been tested.)
- 2012-06-10 17:54:50下载
- 积分：1
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Verilog
verilog编程语言的讲解，有电子科技大学出版(verilog programming language to explain, there is the University of Electronic Science and Technology Publishing)
- 2013-08-14 09:21:43下载
- 积分：1
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XADC
xilinx verilog FPGA驱动AD9613 数据采集DEMO程序(Xilinx Verilog FPGA drives AD9613 data acquisition DEMO program.)
- 2021-03-29 15:19:10下载
- 积分：1
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32bit_multiply
包含32为乘法器的设计，用verilog语言实现，包括booth编码的实现，booth乘法器的实现，3_2压缩器的实现，4_2压缩器的实现，华伦斯树的实现，以及两个testbench文件用于测试。(Contains 32 multiplier design, verilog language, including booth encoding implementations, booth multiplier implementations, 3_2 compressor implementation 4_2 compressor to achieve and realize China Clarence tree, and two testbench file with the to the test.)
- 2015-01-18 21:20:48下载
- 积分：1
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E1（一级欧洲传输标准）
E1 (FIRST ORDER EUROPE TRANSMISSION STANDARD)
- 2023-08-26 23:00:03下载
- 积分：1
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DDS
基于FPGA器件的DDS设计实现中的一个核心部分就是波形存储表的设计。首先采用LPM_ROM和
VHDL选择语句这两种方法进行波形存储表的设计和比较分析 然后考虑到硬件资源的有限性及DDS的精度要
求,对这两种方法的程序进行了优化 最后对这两种方法设计的程序进行仿真和硬件调试。结果表明:采用这两种
方法都能有效地实现DDS中波形存储表的设计。
(DDS-based FPGA devices designed to achieve one of the core of the waveform is stored in table design. First of all, choose to adopt LPM_ROM and VHDL statements of these two methods for the design waveform storage tables and comparative analysis and then, taking into account the limited hardware resources and the accuracy of DDS, the two methods to optimize the process the last of these two methods of process design simulation and hardware debugging. The results showed that: the use of these two methods are all effective ways to achieve the DDS waveform stored in the table design.)
- 2009-05-24 10:56:30下载
- 积分：1
