登录
首页 » VHDL » In the FPGA development board shows the string, using VHDL language, in a simple...

In the FPGA development board shows the string, using VHDL language, in a simple...

于 2022-03-25 发布 文件大小:6.97 MB
0 54
下载积分: 2 下载次数: 1

代码说明:

在FPGA开发板显示字符串,采用VHDL语言,以简单的功能说明FPGA的开发流程.-In the FPGA development board shows the string, using VHDL language, in a simple functional description FPGA-development process.

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • thesis
    thesis for simple virus detection processor which is developed in xilinx
    2015-02-18 23:51:11下载
    积分:1
  • 基于FPGA数字频率计
    基于FPGA数字频率计,VHDL,quartus,8位频率显示,精确度高
    2022-03-07 18:22:47下载
    积分:1
  • Can realize the time digital clock display, and on the hours, minutes, seconds t...
    能实现数字钟中时间的显示,并可对小时,分钟,秒进行调整-Can realize the time digital clock display, and on the hours, minutes, seconds to adjust
    2022-04-29 18:33:18下载
    积分:1
  • 适用于FPGA的SOPC方面的程序开发方面,可以用于添加COMPENENT
    适用于FPGA的SOPC方面的程序开发方面,可以用于添加COMPENENT-Applicable to FPGA-SOPC procedures development, can be used to add COMPENENT
    2022-03-01 05:39:53下载
    积分:1
  • convotion_decode
    用verilog写的卷积码的编码程序以及viterbi译码程序(Use verilog write convolution code coding procedures and viterbi decoding program)
    2012-09-06 20:24:55下载
    积分:1
  • clock_smg
    自己做的数码管显示的时钟 一个非常简单的FPGA时钟 用累加做的(To do their own digital display clock of the FPGA clock is a very simple to do with the cumulative)
    2011-09-27 21:07:54下载
    积分:1
  • 04_ep2c8_vga_test
    VIP FPGA板的配套例子,这个是VGA格式lcd液晶屏幕显示用。(VIP board supporting example of this is the VGA format PREVIEW.)
    2013-10-18 19:03:37下载
    积分:1
  • shiyan5
    应用布莱克曼窗实现FIR滤波器,并绘制相应波形图案(Application Blackman window FIR filter, and draw the corresponding waveform pattern)
    2014-01-09 11:50:49下载
    积分:1
  • TDMsystem
    实现多路可变时分复用,包括复接器,解复接,比特同步,帧同步,分频器(Implement multi-channel variable time division multiplexing, including multiplexer, demultiplexing, bit synchronization, frame synchronization, frequency divider)
    2018-09-16 23:29:09下载
    积分:1
  • Verilog languages with four arithmetic logic unit ALU, functional reference to 7...
    用verilog语言编写的4位算术逻辑单元ALU,功能参考74181,包含.v文件以及测试用.vwf文件-Verilog languages with four arithmetic logic unit ALU, functional reference to 74,181, including. V documents and testing. Vwf document
    2023-07-06 11:15:03下载
    积分:1
  • 696518资源总数
  • 104305会员总数
  • 11今日下载