登录
首页 » VHDL » Modelsim concise user manual is very suitable for novice to use

Modelsim concise user manual is very suitable for novice to use

于 2022-06-17 发布 文件大小:231.91 kB
0 70
下载积分: 2 下载次数: 1

代码说明:

Modelsim简明使用手册,十分适合新手使用-Modelsim concise user manual is very suitable for novice to use

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • taxi
    出租车的计费功能的实现,计量模块、计费模块、控制模块、译码模块。(taxi fee)
    2010-01-16 22:25:33下载
    积分:1
  • updown
    VHDL Programmes -2 for dumping on FPGA
    2014-02-12 00:22:46下载
    积分:1
  • buffer_display是4X4KEYPAD的输出显示模块。可以显示6个连续的按键...
    buffer_display是4X4KEYPAD的输出显示模块。可以显示6个连续的按键-buffer_display is 4X4KEYPAD output module. It showed six consecutive Press
    2022-12-12 05:35:03下载
    积分:1
  • 一款8位Turbo
    一款8位Turbo-51的CPU软核的设计-An 8 Turbo-51" s soft-core CPU design ....
    2022-02-25 13:52:11下载
    积分:1
  • 这个源代码可以把DE2的板子作为一个USB设备使用,以便用PC软件去控制DE2...
    这个源代码可以把DE2的板子作为一个USB设备使用,以便用PC软件去控制DE2-the source code can Dictyophora the board as a USB device use, to use PC software to control DE2
    2023-05-01 13:20:04下载
    积分:1
  • 110819_1
    基于sopc的lcd时钟,开发工具为nios ii和quartus ii9.0(Based on sopc the lcd clock, development tools for the nios ii and quartus ii9.0)
    2011-08-22 10:28:50下载
    积分:1
  • Design-of-taxi-meter-Based-on-FPGA
    本文分析了当前国内外出租车计费系统的基本组成和工作原理及主要的两种设计方式:基于单片机的设计方式和基于FPGA的设计方式;并对这两种实现方式的优点和缺点进行分析,比较后确定本系统的方案:基于FPGA的出租车计费系统的设计。(This paper analyzes the current taxi charging system at home and abroad, working principle and basic components of two major design approach: the design methods based on single chip FPGA-based design approach and the two implementations to analyze the strengths and weaknesses, After comparing the program to determine the system: FPGA-based taxi billing system.)
    2011-05-11 15:38:37下载
    积分:1
  • FPGA development board to write the Verilog code: function is from the client co...
    FPGA开发板上写的Verilog代码: 功能是从电脑端发送一个字节,然后把它接收回来。 -FPGA development board to write the Verilog code: function is from the client computer sends a byte, and then receive it back.
    2022-03-17 03:39:34下载
    积分:1
  • Decodificador
    System Verilog decodificator. Enters a value(binary), drops hundreds, tens and units in BCD
    2013-05-15 02:11:45下载
    积分:1
  • 通信基带信号发生器的设计,采用单片机输入频率和波形,在FPGA中实现频率和波形生成...
    通信基带信号发生器的设计,采用单片机输入频率和波形,在FPGA中实现频率和波形生成-Communications base-band signal generator design, the use of single-chip input frequency and waveform, in the FPGA to achieve the frequency and waveform generation
    2022-03-14 12:44:53下载
    积分:1
  • 696518资源总数
  • 104297会员总数
  • 29今日下载