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zhitouzi
原创。掷骰子游戏，VHDL，quartus，北京邮电大学数电实验，实现随机掷骰子游戏，在数码管显示点数，点阵显示输赢，有开机动画以及开机音乐，可实现多人游戏等(games, VHDL, quartus,experiments of BUPT, pure originality,random game, in the digital display dots, dot matrix display winning or losing, there are boot animation and boot music, multiplayer gaming can be achieved)
- 2020-12-24 20:49:04下载
- 积分：1
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Xilinx_2018_Licenses_Downloadly.ir
Xilinx Licenses 2018
- 2020-06-25 08:20:01下载
- 积分：1
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costas_DPSK
采用costas环进行DPSK解调的程序。输入数据速率2.4Kbps，载波频率12KHz，采样率1.6MHz， 输入数据位宽12位，快捕带为799.617Hz(Costas ring using DPSK demodulation process. Input data rate 2.4Kbps, carrier frequency 12KHz, sampling rate 1.6MHz, the input data 12 bits wide, fast catching band is 799.617Hz)
- 2014-06-09 21:50:42下载
- 积分：1
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DA_AD
基于FPGA的AD和DA设计代码及文档(Design code and document of AD and DA based on FPGA)
- 2017-11-07 22:03:30下载
- 积分：1
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verilog实现ALU的源代码，并提供了详细的测试平台！
verilog实现ALU的源代码，并提供了一个详细的测试平台！-achieve ALU Verilog source code, and provide a detailed test platform!
- 2022-03-15 13:01:46下载
- 积分：1
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介绍了FPGA设计的十大准则，对初学者很有用，对于工作多年的同志，也会有整理总结的好处...
介绍了FPGA设计的十大准则，对初学者很有用，对于工作多年的同志，也会有整理总结的好处-Describes the FPGA design of the top ten criteria are useful for beginners, for many years comrades, there will be finishing the benefits of the summary
- 2022-05-09 01:58:50下载
- 积分：1
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Electronic design automation in the conversion of traffic signals on the realiza...
电子设计自动化中关于交通信号的转换的实现程序，基于VHDL语言实现的-Electronic design automation in the conversion of traffic signals on the realization of the procedure, based on the realization of VHDL language
- 2023-05-04 11:45:03下载
- 积分：1
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crc8
8位crc的verilog设计 通过仿真综合验证并已应用在工程里面
(verilog of 8bit error checkout )
- 2021-03-01 11:09:34下载
- 积分：1
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divf_even
基于FPGA cyclone2的偶数分频模块，可实现自定义分频数(Based on FPGA cyclone2
even number of frequency divider module, custom frequency divider can be realized.)
- 2018-11-06 12:11:46下载
- 积分：1
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__keyBoard
vhdl编写的4X4键盘扫描程序，可以有效的消除抖动，并且提供蜂鸣器输出。(VHDL prepared 4X4 keyboard scanner, you can effectively eliminate jitter and provide buzzer output.)
- 2007-10-24 09:11:11下载
- 积分：1
