-
加法器(使用verilog编写的),虽然简单,但是这也是学习verilog最基础的东西!希望大家一起学习!...
加法器(使用verilog编写的),虽然简单,但是这也是学习verilog最基础的东西!希望大家一起学习!-The accumulator (uses the verilog compilation), although it is simple, but this also is studies most foundation of the verilog! Hopes everybody studies together!
- 2023-07-08 05:35:13下载
- 积分:1
-
FIR
本实验主要是在FPGA上实现FIR数字滤波器的功能,不仅有工程文件,还具有论文资料。(This experiment mainly realizes the function of FIR digital filter on FPGA, not only has the engineering document, but also has the thesis information.)
- 2020-10-05 11:27:38下载
- 积分:1
-
VHDL language procedures, functions as follows: What is the keyboard input, in t...
VHDL语言实现的程序,功能如下:在键盘上输入什么,在相应的LCD上显示你输入的字符-VHDL language procedures, functions as follows: What is the keyboard input, in the corresponding LCD display the characters you type
- 2022-04-26 10:47:53下载
- 积分:1
-
shiyan5
应用布莱克曼窗实现FIR滤波器,并绘制相应波形图案(Application Blackman window FIR filter, and draw the corresponding waveform pattern)
- 2014-01-09 11:50:49下载
- 积分:1
-
square_syn
说明: 平方环载波同步法FPGA实现的verilog代码(square loop carrier wave syn)
- 2021-03-04 23:59:32下载
- 积分:1
-
基于DDS的移相信号发生器的设计
4、各个功能的主要源程序
1、移相模块:
= 1 * GB2 * MERGEFORMAT ⑴、相位累加器:
architecture one of add32 is
begin
s
- 2023-02-10 04:25:04下载
- 积分:1
-
CLOCK1027
设计了一个电子时钟,功能包括定点报时,设置闹钟,校时等(Designed an electronic clock, features include fixed-point timekeeping, setting alarms, school hours, etc.)
- 2018-07-01 18:11:41下载
- 积分:1
-
sp6ex15
SRAM读写测试,每秒进行一次单字节SRAM读写,使用chipscope观察时序波形(SRAM read and write test, a single byte SRAM read and write every second, using chipscope to observe the timing waveform)
- 2017-08-02 10:29:57下载
- 积分:1
-
jt2
基于FPGA的交通灯代码,VHDL语言书写。适合新手学习vhdl语言时使用(FPGA-based traffic light code, VHDL language writing. Suitable for novice learning vhdl language used when)
- 2013-10-26 13:30:26下载
- 积分:1
-
FPGA 智能车
智能小车的FPGA程序,能实现小车的前进,后退,转弯,使得小车走一个正方形后停止下来,程序采用vhdl硬件描述语言。
智能小车的FPGA程序,能实现小车的前进,后退,转弯,使得小车走一个正方形后停止下来,程序采用vhdl硬件描述语言。
智能小车的FPGA程序,能实现小车的前进,后退,转弯,使得小车走一个正方形后停止下来,程序采用vhdl硬件描述语言。
- 2022-12-31 15:55:04下载
- 积分:1