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4dbpsk系统的设计实现源码，几个朋友用一个假期的时间协作完成，功能非常好...
4dbpsk系统的设计实现源码，几个朋友用一个假期的时间协作完成，功能非常好-The 4dbpsk system design realization source code, several friends complete it cooperation in one vacation time , the function is extremely good
- 2022-02-04 07:05:28下载
- 积分：1
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RAM控制的VHDL实现 真的很有用
RAM控制的VHDL实现 真的很有用 -VHDL implementation of the RAM control true true useful useful
- 2023-09-01 03:40:03下载
- 积分：1
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IIR-digital-filter-
采用双线性变换法设计IIR数字滤波器设计的c代码，包括低通、高通和带通(Document recording the design of IIR digital filter c code)
- 2011-09-05 17:47:58下载
- 积分：1
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BCD_to_7_seg_decoder
BCD to 7 segments display decoder
- 2015-06-15 22:36:01下载
- 积分：1
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NAND_flash_verilog_vhdl
很好的NAND Flash 硬件驱动语言，支持VHDL和verilog 语言方便移植，如果有想用FPGA直接驱动NAND flash而又不知如何下手的朋友肯定喜欢。(NAND Flash Controller Reference
This reference design is used to interface a NAND Flash device and provides a simple host end interface. The host
end interface of this design is user-configurable. It provides buffer select signal, buffer write enable signal, address
bus, data bus, error status signal, control and handshake signals for the user......)
- 2021-03-08 22:59:28下载
- 积分：1
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Marquee with a program written in VHDL, and 60 binary counter program, one desig...
一个用VHDL编写的跑马灯程序和60进制计数器的程序，一个是自己设计的一个是老师要求，都在实验箱上验证成功，希望对大家有所帮助。-Marquee with a program written in VHDL, and 60 binary counter program, one designed by one teacher asked, are in the experimental boxes proved to be successful, want to help everyone.
- 2022-08-10 07:53:33下载
- 积分：1
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the-verilog-code-of-can-usb-i2c
CAN总线，I2C，USB等的FPGA实现源码(CAN bus, I2C, USB, etc. FPGA implementation source)
- 2012-12-15 01:25:33下载
- 积分：1
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基本逻辑门电路的设计方法，或门的VHDL的设计让你更容易步入VHDL的设计氛围中，简单的或门编制...
基本逻辑门电路的设计方法，或门的VHDL的设计让你更容易步入VHDL的设计氛围中，简单的或门编制-Basic logic gate circuit design methods, or the door of the VHDL design allows you to more easily into the VHDL design environment, the simple OR gate preparation
- 2022-01-30 19:12:35下载
- 积分：1
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Srikanth Vijayaraghavan
Srikanth Vijayaraghavan - A Practical Guide for SystemVerilog Assertions-Srikanth Vijayaraghavan- A Practical Guide for SystemVerilog Assertions
- 2022-05-29 04:08:08下载
- 积分：1
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use of the VHDL language ALTERA company's board up3 have vga signal containi...
使用vhdl语言在altera公司的up3板上产生vga信号，里面有详细的解析和说明，是一个很好的教程。和上一个文件razzle差不多，但是产生的效果不一样。-use of the VHDL language ALTERA company"s board up3 have vga signal containing a detailed analysis and explanation is a good guide. And on a razzle almost document, but the effects are not the same.
- 2022-01-31 21:08:09下载
- 积分：1
