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XAPP134_SDRAM_VHDL
XAPP134 SDRAM VHDL design file
- 2011-01-19 09:57:21下载
- 积分：1
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TEXTIO_Import_txt_Matlab
将FPGA设计仿真结果数据写入到txt记事本中，然后通过Matlab读取txt中的数据并显示图像(write the FPGA simulation result data into textbook,and read these data from textbook and display image in Matlab)
- 2012-12-28 13:42:57下载
- 积分：1
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Dec_mul
时间同步后即可确定每帧数据的起始位置，这样就能完整的截取下每一帧。但是，数据中还带有频偏信息。在常规的通信系统中，多普勒很小仅仅会带来很小的频偏，但是在大多普勒的情况下，频偏将非常大，20马赫的速度将会带来将近34K的频偏。因此，如何很好的纠正频偏即为本系统的难点。
OFDM中，我们将大于子载波间隔倍数的频偏称为整数倍频偏，而将小于一个子载波间隔的频偏称为小数倍频偏。频偏矫正精度只要能保证小于十分之一倍的子载波间隔，频偏就不会对均衡和解调造成影响。本文中我们借鉴这种思想，由于硬件资源限制，我们将在接收端做64点FFT，即相当于将频域划分为64份，我们将小于 的频偏称为小数倍频偏，将 整数倍的频偏称为整数倍频偏。本程序即基于SCHIMDL经典方法完成小数倍频偏纠正(After time synchronization can determine the starting position of each frame data, so you can complete the interception of each frame. However, in the data with frequency information. In conventional communication systems, doppler small will bring only small deviation, but in the case of most of the doppler, frequency PianJiang is very large, 20 Mach speed will lead to deviation of nearly 34 k. Therefore, how to good to correct deviation is the difficulty of this system.
OFDM, we will be bigger than the sub-carrier spacing ratio of frequency deviation is called the integer frequency offset, and the interval will be less than a child carrier frequency offset is called decimal frequency doubling. Deviation is less than one over ten times as long as can guarantee accuracy of sub-carrier spacing, deviation will not affect balance and demodulation. This article, we draw lessons from the idea, due to the limited hardware resources, we will do 64 points FFT at the receiving end, which is equ)
- 2013-12-26 18:00:24下载
- 积分：1
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z_max_spwm
Z源逆变器简单升压模拟仿真。调制方式为SPWM，通过设置三角波幅值和比较电压，即可调节输出电压。(Z-source inverter simple step-up simulation. Modulation mode SPWM, by setting the the triangle amplitude and the comparison voltage to regulate the output voltage.)
- 2020-11-02 19:09:53下载
- 积分：1
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adc_dac
ADC-DAC transmittion works thru SPI on 25 MHZ. Used for some student project on Xilinx sprtan3a FPGA
- 2016-12-01 19:44:33下载
- 积分：1
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GF_2_m_域乘法器的快速设计及FPGA实现，对于rs编翼码的理解和设计有帮助...
GF_2_m_域乘法器的快速设计及FPGA实现，对于rs编翼码的理解和设计有帮助-Domain multiplier GF_2_m_ rapid design and FPGA realization for rs wing made the understanding of code and design has helped
- 2022-04-25 05:12:28下载
- 积分：1
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ad9649的fpga驱动程序cf_ad9649_ebz_edk_14_4_2013_03_19
ad9649的fpga驱动程序,FMC接口，基于Xilinx KC705(AD9649 Evaluation Board, FMC Interposer & Xilinx KC705 Reference Design)
- 2020-06-28 14:00:02下载
- 积分：1
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Verilog liushuideng shanshuodeng乘虚
verilog实现闪烁灯和流水灯dechengxu-verilog liushuideng shanshuodeng chengxu
- 2022-06-18 10:08:00下载
- 积分：1
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05_key_test
利用FPGA实现对外设按键的控制，例如用户库用按键控制跑马灯的效果(FPGA is used to realize the control of external keys, such as the effect of user database using keys to control the running horse lamp)
- 2020-06-16 10:00:11下载
- 积分：1
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用于故障检测的正交拉丁方算法
纠错和单故障检测代码使用正交拉丁方是用VHDL语言写的。
- 2022-01-28 15:15:37下载
- 积分：1
