verilog入门基础以及简单编程介绍，verilog是近几年发展迅速的一门硬件语言-Verilog entry basis, as well as introduce a simple programming, verilog in recent years the rapid development of a hardware language
FPGA与DSP的EMIFA口接口程序.在FPGA内分配了两块双BUFFER与DSP进行通信.-FPGA and DSP EMIFA mouth interface program. The FPGA distribution within the two-SUBJECT ER and DSP communication.
FPGA开发PCIe的源码，采用VHDL语言，通过此源码，能更好的掌握PCIe总线，使开发者少走弯路，
VHDL的基本数学运算库,非常好用-VHDL basic arithmetic library, a very handy! !
利用AT89C51实现LCD日历电子钟源码-AT89C51 realization of the use of electronic LCD calendar clock source
viterbi译码器的IP核，可以直接编译使用-viterbi decoder IP core, the compiler can directly use
潘松编写的EDA书籍！学习FPGA的好帮手！-Pinson prepared by the EDA books! Learning FPGA a good helper!
Verilog写的 8 位超前进位加法器-Verilog write 8-bit CLA
Verilog语言编写的电话计费系统，这只是源代码，需要在quartusII等软件下运用-Verilog language telephone billing system, this is only the source code, the need to use software such as quartusII
用VHDL语言编写的代码，以供大家学习和交流，方便大家学习！-prepared using VHDL code for all to study and exchange to facilitate learning!
乐曲演奏电路，能演奏歌曲，同时在数码管上显示演奏的乐曲音符的数字。-Music concert circuit, can play songs at the same time in the digital tube displays the number of notes played music.
硬件描述语言VHDL的频率计程序,可用于做实验,或者初学者借鉴.-Hardware Description Language VHDL of the frequency counter program can be used for experiments, or the beginners learn.
build a music player with nios 2
基于VHDL语言描述的一个分频器，根据端口值，可作为四分频，八分频等分频器使用。-based on VHDL description of a divider, according to port value, as a quarter of frequency, Frequency Divider interval such use.
ADC0809 VHDL控制程序,基于VHDL语言，实现对ADC0809控制.-ADC0809 VHDL control procedures, based on the VHDL language, to achieve control of ADC0809.
这一计划表明它是如何在如此逻辑门是门NAND，什么它NAND它是结合两个闸门之一，并没有。
详细介绍modelsim的使用方法，详细的介绍modelsim使用方法-Details on the use of ModelSim, ModelSim detail using the method
SPI接口的实现以及对外设的读写操作，其中包扩了几种工作方式，同时可以读取外设的版本号，传输速率可以达到2Mbps-SPI interface implementation, as well as read and write operations on the peripheral, which extended several work packages at the same time can read the version number of peripherals, transfer rate up to 2Mbps
带自适应波特率发生器UART实现，经过FPGA验证的！-UART baud rate generator with adaptive realization, after FPGA validation!
本站资源：696518 个
本站会员：104316 个
总计下载：494603 次
今日上传：0 个
Copyright© 2019-2025 |
Powered by Imdn
|
浙ICP备16007336号
|
|
联系客服（QQ：3324461878）
本网站资源收集自网络及网站用户上传，若有侵权请邮件至（3324461878@qq.com），核实后我们会在24小时内删除，谢谢！
