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VLSIrtl_spi
说明: verilog语言写的SPI接口,全同步设计,低门数,可以很容易应用到嵌入设计方案中.(Verilog language to write the SPI interface, all synchronous design, low gate count. it is very easy to use embedded design programs.)
- 2021-05-13 13:30:02下载
- 积分:1
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UART
基于FPGA设计的串口发送及接收程序,波特率可调(FPGA - based serial port sending and receiving)
- 2020-06-18 23:20:01下载
- 积分:1
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mike11xns
mike11河道断面处理软件,将断面格式写成11要求的格式(MIKE11 river section processing software, the section format 11 format
)
- 2021-04-06 17:29:02下载
- 积分:1
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dds_test
直接数字式频率合成器DDS设计、Verilog。
产生的信号可以是正弦波或方波、三角波、锯齿波等,自选。
采用DDS技术,将所需生成的波形写入ROM中,按照相位累加原理合成任意波形。
此方案得到的波形稳定,精度高,产生波形频率范围大,容易产生高频。
本实验在设计的模块中,包含以下功能:
(1)通过 freq 信号输入需要的频率的值;
(2)通过 wave_sel 信号选择所需的波形;
(3)通过 amp_adj 信号选择波形放大的倍数。(DDS design of direct digital frequency synthesizer, Verilog.
The generated signal can be sinusoidal or square wave, triangular wave, sawtooth wave and so on, optional.
By using DDS technology, the required waveforms are written into ROM, and arbitrary waveforms are synthesized according to the principle of phase accumulation.
The waveform obtained by this scheme is stable, accurate and easy to generate high frequency waveform.
This experiment includes the following functions in the designed module:
(1) Input the required frequency value through freq signal;
(2) Choosing the required waveform by wave_sel signal;
(3) Select the multiplier of waveform amplification by amp_adj signal.)
- 2019-01-19 16:07:50下载
- 积分:1
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shift_regeister
用blockram实现移位寄存器,开发语言为verilog hdl(Shift register with blockram achieve the development language for the verilog hdl)
- 2020-08-13 22:18:29下载
- 积分:1
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可综合的vhdl设计特点.pdf
可综合的vhdl设计特点.pdf-synthesizable VHDL design features. Pdf
- 2023-08-19 15:25:03下载
- 积分:1
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FPGA
基于FPGA的频率相位可调DDS信号发生器-FPGA-based phase adjustable frequency DDS signal generator
- 2022-01-26 08:17:52下载
- 积分:1
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esvl
MATLAB Filter Design HDL Coder
Simunlink HDL Coder
Xilinx ISE Webpack
- 2011-06-15 19:56:11下载
- 积分:1
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四位动态刷新数码管显示,VERILOG代码,含详细的中文注释....
四位动态刷新数码管显示,VERILOG代码,含详细的中文注释.-Four dynamic refresh digital tube display, VERILOG code, with detailed notes in Chinese.
- 2022-02-10 00:53:27下载
- 积分:1
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xilinx_dna_read
该模块已经成功运用在xilinx xc6slx45t,xc6slx75t多个产品中,经过实践证明,采用dna及其加密算法加密是一种成本低廉(无需另外加密芯片)可靠的加密手段。Xilinx Spartan-6 FPGA读取DNA数据并进行比较,产生比较结果信号输出。附带有xilinx DNA.ppt说明及调试注意事项。(The module has been successfully used in xilinx xc6slx45t, multiple xc6slx75t products, proven, and the encryption algorithm uses dna is a low-cost (no additional encryption chip) reliable means of encryption. Xilinx Spartan-6 FPGA reads the data and compare DNA to produce a comparison result signal output. Xilinx DNA.ppt comes with instructions and commissioning notes.)
- 2020-10-15 20:07:29下载
- 积分:1