shift_regeister

代码说明：

  用blockram实现移位寄存器，开发语言为verilog hdl(Shift register with blockram achieve the development language for the verilog hdl)

文件列表：

sim
...\cic.do,575,2010-05-03
...\qq.cr.mti,2,2010-05-03
...\qq.mpf,30559,2010-05-03
...\testbench
...\.........\clk_rst_gen.v,1073,2010-04-17
...\.........\glbl.v,1172,2006-12-02
...\.........\tb.v,2315,2010-05-03
...\work
...\....\clk_rst_gen
...\....\...........\verilog.asm,4908,2010-05-03
...\....\...........\_primary.dat,463,2010-05-03
...\....\...........\_primary.vhd,329,2010-05-03
...\....\dpram_block
...\....\...........\verilog.asm,11400,2010-05-03
...\....\...........\_primary.dat,824,2010-05-03
...\....\...........\_primary.vhd,568,2010-05-03
...\....\glbl
...\....\....\verilog.asm,8862,2010-05-03
...\....\....\_primary.dat,1093,2010-05-03
...\....\....\_primary.vhd,172,2010-05-03
...\....\shift_reg_module
...\....\................\verilog.asm,29631,2010-05-03
...\....\................\_primary.dat,5016,2010-05-03
...\....\................\_primary.vhd,593,2010-05-03
...\....\tb
...\....\..\verilog.asm,6664,2010-05-03
...\....\..\_primary.dat,1210,2010-05-03
...\....\..\_primary.vhd,64,2010-05-03
...\....\htm" target=_blank>_info,914,2010-05-03
...\....\_temp
src
...\dpram_block.v,2624,2010-04-05
...\shift_reg_module.v,7889,2010-05-03
用blockram实现移位寄存器.doc,264704,2010-05-03