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AV视频信号输入后,存入SDRAM中然后在PC上面进行显示的代码。...
AV视频信号输入后,存入SDRAM中然后在PC上面进行显示的代码。-AV video signal input into the SDRAM in the PC and then display the code above.
- 2023-03-27 03:30:03下载
- 积分:1
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vhdl testbench的编写,textio的编写是一个难点,也是一个重点,而这是本人搜集的多篇关于textio的文章,同时附有简单注释!...
vhdl testbench的编写,textio的编写是一个难点,也是一个重点,而这是本人搜集的多篇关于textio的文章,同时附有简单注释!-vhdl testbench preparation, textio the preparation is a difficult, but also a focus, and this is my collection of articles on textio the article, at the same time with a simple note!
- 2022-10-01 22:10:03下载
- 积分:1
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DAC2902
verilog编写的DAC2902程序,用于高速的数模转换(verilog language,using for DAC2902 digital analog converter)
- 2011-08-07 14:29:54下载
- 积分:1
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rams
说明: combinatorial modules
- 2019-04-13 19:41:21下载
- 积分:1
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VHDL硬件描述语言与数字逻辑电路设计,学习VHDL的好资料
VHDL硬件描述语言与数字逻辑电路设计,学习VHDL的好资料-VHDL hardware description language and digital logic circuit design, VHDL learning good information
- 2022-11-11 07:30:07下载
- 积分:1
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在ise10.1.3 Xilinx PicoBlaze的应用开发。
Xilinx PicoBlaze application developed in ISE10.1.3.
- 2023-07-28 07:25:03下载
- 积分:1
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pc104vhdl_change
PC104总线的CPLD代码,调试已经通过,可以修改应用到其他的工程(PC104 bus CPLD code, debugging has been passed, you can modify the application to other engineering
示例用法:)
- 2013-08-29 12:07:43下载
- 积分:1
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ISE7.1i 中文教程 适合xilinx的FPGA/CPLD用户
ISE7.1i 中文教程 适合xilinx的FPGA/CPLD用户-Chinese ISE7.1i the xilinx tutorial for FPGA/CPLD users
- 2022-02-25 00:06:16下载
- 积分:1
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here is gangadhar call by mailing me
here is gangadhar call by mailing me
- 2022-01-26 05:55:47下载
- 积分:1
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UART的源(格版)
UART 源码 (lattice version)-UART source (lattice version)
- 2022-10-19 10:25:04下载
- 积分:1