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sdram_module3
能够实现16位的SDRAM的读写，没有仿真文件，只有SDRAM读写的源代码，用Verilog编写(can complete read or write sdram， only include Verilog code and no simulation files)
- 2013-11-25 12:43:11下载
- 积分：1
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GUI
1）选择一个语音信号作为分析对象，或录制一段语音信号； 2）对语音信号进行采样，画出采样前后语音信号的时域波形和频谱图； 3）利用MATLAB中的随机函数产生噪声加入到语音信号中，使语音信号被污染，然后进行频谱分析； 4）设计用于处理该语音信号的数字滤波器，给出滤波器的性能指标，画出滤波器的频率响应； 5）对被噪声污染的语音信号进行滤波，画出滤波前后信号的时域波形和频谱，并对滤波前后的信号进行比较和分析； 6）回放各步骤的语音信号，给出相应处理程序及运行结果分析。(1) Select a voice signal as an analysis object, or record a voice signal 2) sampling the voice signal, draw the waveform and frequency spectrum of the time domain before and after sampling the speech signal 3) using the random function in MATLAB generated noise was added to the speech signal, the speech signal to be contaminated, and then spectrum analysis 4) for processing the speech signal, the digital filter design, given the performance of the filter to draw the filter' s frequency response 5) on the noise pollution of the speech signal is filtered, time-domain waveform and spectrum draw before and after filtering the signal before and after filtering, and the signal for comparison and analysis 6) playback of the speech signal for each step, given the results of the corresponding processing procedures and run analysis.)
- 2021-03-18 17:29:19下载
- 积分：1
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CCD
对ccd图像进行解码采集，并通过VGA输出(Ccd image decoding of the collection, and through the VGA output)
- 2009-07-16 22:35:30下载
- 积分：1
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Using VHDL realize CPLD (EPM240T100C5) output of the VGA screen
利用VHDL实现CPLD（EPM240T100C5）的VGA屏幕输出-Using VHDL realize CPLD (EPM240T100C5) output of the VGA screen
- 2023-04-13 10:15:04下载
- 积分：1
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Program to implement convolution of two signals.
Program to implement convolution of two signals.
- 2023-04-30 22:25:04下载
- 积分：1
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UART
通过PC串口调试助手向MINI板发数据（HEX），在数码管显示接收到的数据，并回传给PC(The debugging assistant sends data (HEX) to MINI board through PC serial port, displays the received data in the digital tube and sends it back to PC)
- 2018-11-15 22:36:21下载
- 积分：1
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VHDL--波形发生器
用FPGA产生正弦波、方波、三角波和锯齿波，可以通过按键控制输出波形及其频率，并且可以通过lcd显示输出的波形名字及频率
- 2022-02-12 06:23:05下载
- 积分：1
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counter
本例源代码文件由用户按照书中的操作步骤自己生成，“Example-2-1Project_Navigator_Demo源代码”目录下为源代码的参考文件。“Example-2-1Project_Navigator_Democounter”目录下为完整的工程，包括源代码文件、综合与实现的结果文件、ISE工程文件等，可以使用ISE工程管理器打开工程，供读者参考(In this case the source code files by the user in accordance with the steps the book itself is generated, "Example-2-1 Project_Navigator_Demo source" directory as the source code reference document. "Example-2-1 Project_Navigator_Demo counter" directory for a complete project, including source code files, integrated with the realization of the outcome document, ISE project file, etc. You can use ISE Project Manager, open the project for the reader is referred to)
- 2009-09-19 13:53:10下载
- 积分：1
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elecfans.com-verilog教程书
从入门到精通，从简单到难，带你轻轻松松玩转FPGA(It is used to measure noise and detect road noise pollution. It is accurate and has good effect.)
- 2018-03-10 20:48:26下载
- 积分：1
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Idddc_30mF
中频70M，30M带宽LFM信号，采样率为102.4M，，数字下变频后，还进行了三倍抽取，最后还得到I，Q两路信号
(IF 70M, 30M bandwidth LFM signal, the sampling rate 102.4M, under digital variable frequency after also carried out three times extracted, and finally also received the I and Q signals)
- 2012-07-25 23:56:30下载
- 积分：1
