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Some_classic_examples_of_VHDL_language_source_code
VHDL语言的一些经典实例源代码,包括状态机,时序电路,组合逻辑电路等(Some classic examples of VHDL language source code, including the state machine, sequential circuits, combinational logic circuits)
- 2010-07-11 12:50:06下载
- 积分:1
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16 point radix 2
使用 c languageit 的 16 点基 2 fft 代码将 16 点时间域序列转换为频率域
- 2022-10-05 23:25:03下载
- 积分:1
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RS_Encoder
具有16个校验位的RS编码器,在FPGA上实现。(With 16 RS encoder, the parity bit in the FPGA.)
- 2012-08-06 11:52:37下载
- 积分:1
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EX7_BINARY2GRAY
本模块是实现格雷码和二进制码的转换,并给出仿真测试文件(This module is to achieve the conversion of Gray code and binary code, and give the simulation test file)
- 2015-04-14 16:48:38下载
- 积分:1
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cyclone3_handbook-datasheet
cyclone3_handbook-datasheet
- 2018-10-26 21:28:06下载
- 积分:1
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利用Verilog HDL对AD7705进行控制ADC采样,实验室师兄的
利用Verilog HDL对AD7705进行控制ADC采样,实验室师兄的-Using Verilog HDL to the AD7705 control ADC sampling, laboratory师兄the
- 2023-01-10 03:55:04下载
- 积分:1
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util_gmii_to_rgmii
说明: rgmii代码编写,实现rgmii接口功能,可进行参考设计(The rgmii code is written to realize the function of rgmii interface, which can be used for reference design)
- 2021-03-18 10:19:20下载
- 积分:1
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ps2_mouse
ps2 mouse controller
- 2008-09-27 21:29:42下载
- 积分:1
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Using FPGA realize DDS, can be frequency, amplitude from hardware to complete
用FPGA实现DDS,可变频,幅值由硬件完成-Using FPGA realize DDS, can be frequency, amplitude from hardware to complete
- 2022-04-02 05:52:39下载
- 积分:1
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stbc空时编码源码,非常好的程序。verilog程序
stbc空时编码源码,非常好的程序。verilog程序-STBC Space-Time Coding Source, very good program. Verilog program
- 2022-03-04 18:24:10下载
- 积分:1