▍1. 大名鼎鼎的Synopsys公司出的8051IP Core VHDL语言编写,能被keilC51支持...
大名鼎鼎的Synopsys公司出的8051IP Core VHDL语言编写,能被keilC51支持-famous Synopsys Core 8051IP the VHDL language, can be supported keilC51
大名鼎鼎的Synopsys公司出的8051IP Core VHDL语言编写,能被keilC51支持-famous Synopsys Core 8051IP the VHDL language, can be supported keilC51
CH4CH2CH1VHDL 数字电路参考书所有程序9-CH4CH2CH1VHDL digital circuit reference all proceedings 9
altera公司cpld/fpga开发软件quartus2中文使用教程-altera company cpld/fpga development of software to use Chinese quartus2 Guide
你的任务是为一个单一的"传统"的先进的电梯控制器的设计 电梯(即,简单的向上/向下按钮呼叫电梯) 在四楼经营 建设。所述的基本单电梯设计规范 以下各节。 扩展您的两部电梯的设计是可选的将会奖励你额外的奖金。
verilog实现的简易通用型CPI接口-verilog easy to achieve CPI general-purpose interface
这是 MIPS32 设计的一部分,它是面向 FPGA。它已经过测试与系统的 verilog,通过所有考试。它实现了几个 instrucctions。和它是河津 fot 计时员。它 implemets 逻辑和 aritmetics instruccions,它已被写入 VHDL 中。
very much verilog code for the beginner
sequenceur,该模块的主要功能是,控制器,在基本的risc架构中,实现各个模块的控制-sequenceur,control
vhdl经典源代码――键盘接口设计,入门者必须掌握-vhdl classical source code-- the keyboard interface design, beginners must master
verilog编写的alu模块-Verilog modules prepared by the ALU
FPGA加密的方法,对于那些需要加密自己的vhdl源代码的人来说,很有用-FPGA encryption methods for those who need to encrypt their VHDL source code in a way, very useful
DDR(双速率)SDRAM控制器参考设计,xilinx提供-DDR (double data rate) SDRAM controller reference design for Xilinx
Toplevel VHDL Structural model of a system containing 8051 -Toplevel VHDL Structural model of a system containing 8051
基于altera ep2c8双口RAM -Altera ep2c8-based dual-port RAM
数字频率计(试验报告)适合初学者参考-Digtal Frequency Test(experiment report) suit Raw recruit reference
实用的程序代码,希望对大家有用,已经调试通过-Practical program code, in the hope that useful to everybody, has debugging through
这是“状态机设计(讲稿)”,希望对正在学VHDL的同学有帮助,谢谢!-This is the "state machine design (the script)", and I hope to learn VHDL is there to help the students, thank you!
vhdl adder with two input 4-bit and output of 4 bits and carry