登录
首页 » VHDL » 数字频率计(试验报告)适合初学者参考

数字频率计(试验报告)适合初学者参考

于 2022-11-18 发布 文件大小:64.64 kB
0 61
下载积分: 2 下载次数: 1

代码说明:

数字频率计(试验报告)适合初学者参考-Digtal Frequency Test(experiment report) suit Raw recruit reference

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • ethernet_loopback
    通过FPGA驱动千兆以太网口,完成SPARTAN6上的UDP数据包闭环测试,即通过网口发送数据包到FPGA,FPGA内部将接收到的数据返回到PC机,建议测试之前添加ARP静态绑定,FGPA内部的IP以及MAC地址在ROM里的COE文档里可以看到,发送端添加了CRC以及整体CHECKSUM的计算(Driven by FPGA Gigabit Ethernet port, UDP SPARTAN6 data packet on the closed loop test, through the network to send data packets to FPGA, FPGA will receive the data back to the PC, the proposed test before adding ARP static binding, FGPA internal IP and MAC address in the COE document in the ROM where you can see, the sender adds CRC and CHECKSUM integral calculation)
    2017-11-20 10:21:38下载
    积分:1
  • This tutorial presents an introduction to Altera’s Nios R II processor, which...
    This tutorial presents an introduction to Altera’s Nios R II processor, which is a soft processor that can be in- stantiated on an Altera FPGA device. It describes the basic architecture of Nios II and its instruction set. The NiosII processor and its associated memory and peripheral components are easily instantiated by using Altera’s SOPCBuilder in conjuction with the Quartus R II software.
    2023-06-21 11:25:02下载
    积分:1
  • 主要是步进电机的驱动源,用Verilog VHDL开发,个人取向…
    XC95144步进电机驱动器源码,采用verilog vhdl开发,个人原创-XC95144 stepper motor drive source, using verilog vhdl development, personal originality
    2022-03-23 12:55:12下载
    积分:1
  • bayer_3RGB_interpolation
    一个基于FPGA用verilogHDL设计的bayer格式转RGB格式的模块,本人设计(a code used for bayer_3RGB_interpolation ,which based on FPGA by verilogHDL)
    2011-12-25 21:58:05下载
    积分:1
  • SourceFile
    PS2键盘实验Verilog HDL代码(PS2 keyboard experiment Verilog HDL code)
    2008-03-15 01:14:55下载
    积分:1
  • histogram_new
    Verilog语言描述,统计图片的像素值直方图(Verilog,Pictures of the pixel value histogram statistics)
    2021-03-04 17:39:31下载
    积分:1
  • G.hnMAC层功能代码MPDU ASSEMBLER
    G.hnMAC层功能代码,实现了MPDU的资源调度(G.gn MAC codeG.gn MAC codeG.gn MAC code)
    2011-05-18 11:23:08下载
    积分:1
  • 自己使用VHDL语言编写的24位寄存器.主要用于DDS中
    自己使用VHDL语言编写的24位寄存器.主要用于DDS中-24bit_register
    2022-09-06 21:25:03下载
    积分:1
  • MATLABwaveanalysis
    小波分析wave analysiswave analysiswave analysis(wave analysiswave analysis)
    2009-12-16 10:56:09下载
    积分:1
  • sine_cordic
    generate sine wave. Inputs : Amplitude, phasein, frequency
    2013-07-22 10:25:41下载
    积分:1
  • 696518资源总数
  • 104316会员总数
  • 17今日下载