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采用高速AD的存储示波器设计,基于EP1C3板GWADDA板存储示波器,内有说明文件...
采用高速AD的存储示波器设计,基于EP1C3板GWADDA板存储示波器,内有说明文件-AD using high-speed storage oscilloscope design, based on EP1C3 board GWADDA board storage oscilloscope, which has the documentation
- 2022-03-22 11:22:04下载
- 积分:1
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e2
说明: Any change to the value of Mresults in immediate and phase-continuous changes in the output frequency
- 2014-02-23 02:42:47下载
- 积分:1
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time_echo
GPS接收机相关器中关于积分清零模块、历元计数模块、时钟模块、以及整个相关器(accumulator、epoch counter、time base、gps baseband)
- 2015-08-28 23:47:56下载
- 积分:1
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1.rar
此为数字逻辑书上的答案,应该很多同学都需要吧,关于数字逻辑(This is the answer books, digital logic, it should be a lot of students need it, on the digital logic)
- 2009-09-17 13:16:19下载
- 积分:1
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Project7_5
说明: 基于fpga状态机的交通灯设计,亮灯时间自己修改,程序简单易懂。(Traffic light design based on FPGA state machine, light time self-modifying, the program is simple and easy to understand.)
- 2020-06-18 04:00:01下载
- 积分:1
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用VHDL语言设计四位全加器,有低位进位和高位进位。
用VHDL语言设计四位全加器,有低位进位和高位进位。-VHDL language with four full-adder design, there are low and the high binary binary.
- 2022-03-20 15:03:38下载
- 积分:1
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数字密码锁
数字密码锁的vhdl实现,包括设置密码,修改密码,报警。
- 2022-08-09 06:17:11下载
- 积分:1
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CPM-spread-spectrum
针对传统CPM正交扩频系统实现复杂度高的问题,提出了一种基于预编码的CPM正交扩频系统。(Pre—encoded CPM orthogonal spread spectrum system)
- 2014-10-05 17:06:35下载
- 积分:1
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DS1302
基于DS1302芯片的VERILOG 语言数字钟。可实现年月日时分秒显示。(DS1302 chip-based language VERILOG digital clock. Date can be achieved when every minute display.)
- 2014-06-26 15:53:06下载
- 积分:1
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1
说明: 单周期cpu,使用verilog编写的的单周期cpu支持......等功能(Single cycle CPU, using Verilog written single cycle CPU support... And other functions)
- 2021-03-15 08:45:07下载
- 积分:1