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0001_EPM3064最小系统模块_带JTAG_LED_2mm插针
EMP3064的开发板板，原理图，verilog例子，板子说明，规格书，全套资料(EMP3064 development board, schematics, Verilog examples, board instructions, specifications, a full set of information)
- 2020-12-01 09:29:26下载
- 积分：1
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Multiplier
圖形介面乘法器,也可自行使用verilog去改(Graphical interface multiplier, also free to use verilog go and change)
- 2012-10-25 21:12:49下载
- 积分：1
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exp_rom
通过MATLAB产生单脉冲信号的数据，存储下来作为verilog代码实现的DDS的数据源，用于验证DA数据的ddio的调试是否有问题。(The data of monopulse signal generated by MATLAB is stored as the data source of DDS implemented by Verilog code to verify whether the ddio debugging of DA data is problematic.)
- 2020-06-23 04:40:02下载
- 积分：1
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xc2s100E FPGA的原理图
给想涉足FPGA的新人参考
xc2s100E FPGA的原理图
给想涉足FPGA的新人参考-xc2s100E FPGA schematic diagram of the FPGA would like to set foot in the new reference
- 2023-05-12 14:50:04下载
- 积分：1
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weitb
在数字通信中，通常直接从接收到的数字信号中提取位同步信号，这种直接法按其提取同步信号的方式，大致可分为滤波法和锁相法。锁相法是指利用锁相环来提取位同步信号的方法，本设计方案就是基于锁相环的位同步提取方法，能够比较快速地提取位同步时钟，并且设计简单，方便修改参数。采用Quartus II设计软件对系统进行了仿真试验，并用Altera的Cyclone II系列FPGA芯片Ep2c5予以实现。(In digital communication, usually from receiving directly in digital signal extracted a synchronized signal, the direct method according to the extraction synchronized signal way, can be roughly divided into filtering method and phase lock method. Phase lock method is using of phase locked loop to extract a synchronized signal method, the design scheme is based on phase locked loop of a synchronous extraction method and can be quickly extract a synchronous clock, and design simple, convenient modification parameter. The Quartus II design software of the system, and the simulation test Altera Cyclone II FPGA chip to achieve Ep2c5 series.)
- 2020-12-01 10:39:28下载
- 积分：1
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DW_apb_wdt
verilog实现watch dog，可直接用于芯片开发中。(erilog realization watchdog, can be directly used for chip development.)
- 2020-12-25 16:09:06下载
- 积分：1
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DDR SDRAM控制器verilog代码及中文说明文档,对DDR开发很有用的哈。...
DDR SDRAM控制器verilog代码及中文说明文档,对DDR开发很有用的哈。-Verilog source code for DDR SDRAM controler design,including guide book in chinese.
- 2022-03-10 08:09:15下载
- 积分：1
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一些有用的PicoBlaze的来源。
Some useful PicoBlaze sources.
- 2022-01-26 02:08:20下载
- 积分：1
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DVI_LED
基于DVI协议动态全彩LED大屏幕发送卡设计与实现,成本比较低,效果很好,可以实现高清视频(Dynamic full-color LED large screen based on the DVI protocol send a card design and relatively low cost, good effect, and can achieve high-definition video)
- 2012-08-03 13:08:44下载
- 积分：1
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alu
说明： VHDL实现的算术逻辑计算单元（ALU），包括modersim测试文件，即仿真结果。(VHDL implementation of the arithmetic logic calculation unit (ALU), including modersim test file, the simulation results.)
- 2011-03-26 21:18:01下载
- 积分：1
