HDMI_FPGA

代码说明：

  该源码可基于FPGA设置多分辨率的HDMI显示，且其包含了完整的时序和端口、地址映射，可以很方便的将其移植(The source code can be set based on FPGA multi-resolution HDMI display, and it includes a complete timing and port, address mapping, it can be easily transplanted)

文件列表：

vip_ex16
........\altmemphy-library
........\.................\auk_ddr_hp_controller.ocp,488,2014-06-14
........\alt_mem_ddrx_addr_cmd.v,24623,2014-06-14
........\alt_mem_ddrx_addr_cmd_wrap.v,55196,2014-06-14
........\alt_mem_ddrx_arbiter.v,52523,2014-06-14
........\alt_mem_ddrx_buffer.v,4029,2014-06-14
........\alt_mem_ddrx_buffer_manager.v,7962,2014-06-14
........\alt_mem_ddrx_burst_gen.v,68287,2014-06-14
........\alt_mem_ddrx_burst_tracking.v,3799,2014-06-14
........\alt_mem_ddrx_cmd_gen.v,120966,2014-06-14
........\alt_mem_ddrx_controller.v,176557,2014-06-14
........\alt_mem_ddrx_controller_st_top.v,96047,2014-06-14
........\alt_mem_ddrx_csr.v,51657,2014-06-14
........\alt_mem_ddrx_dataid_manager.v,40585,2014-06-14
........\alt_mem_ddrx_ddr2_odt_gen.v,18004,2014-06-14
........\alt_mem_ddrx_ddr3_odt_gen.v,17824,2014-06-14
........\alt_mem_ddrx_define.iv,1402,2014-06-14
........\alt_mem_ddrx_ecc_decoder.v,15181,2014-06-14
........\alt_mem_ddrx_ecc_decoder_32_syn.v,32582,2014-06-14
........\alt_mem_ddrx_ecc_decoder_64_syn.v,58573,2014-06-14
........\alt_mem_ddrx_ecc_encoder.v,9895,2014-06-14
........\alt_mem_ddrx_ecc_encoder_32_syn.v,12982,2014-06-14
........\alt_mem_ddrx_ecc_encoder_64_syn.v,21043,2014-06-14
........\alt_mem_ddrx_ecc_encoder_decoder_wrapper.v,48802,2014-06-14
........\alt_mem_ddrx_fifo.v,7367,2014-06-14
........\alt_mem_ddrx_input_if.v,9995,2014-06-14
........\alt_mem_ddrx_list.v,7603,2014-06-14
........\alt_mem_ddrx_lpddr2_addr_cmd.v,16892,2014-06-14
........\alt_mem_ddrx_mm_st_converter.v,10945,2014-06-14
........\alt_mem_ddrx_odt_gen.v,14233,2014-06-14
........\alt_mem_ddrx_rank_timer.v,119540,2014-06-14
........\alt_mem_ddrx_rdata_path.v,51123,2014-06-14
........\alt_mem_ddrx_rdwr_data_tmg.v,201262,2014-06-14
........\alt_mem_ddrx_sideband.v,73630,2014-06-14
........\alt_mem_ddrx_tbp.v,170027,2014-06-14
........\alt_mem_ddrx_timing_param.v,67710,2014-06-14
........\alt_mem_ddrx_wdata_path.v,53451,2014-06-14
........\alt_mem_phy_defines.v,5281,2014-06-14
........\data_source.v,6064,2014-06-14
........\ddr2_controller.bsf,8122,2014-06-14
........\ddr2_controller.html,6335,2014-06-14
........\ddr2_controller.ppf,16788,2014-06-14
........\ddr2_controller.qip,5959,2014-06-14
........\ddr2_controller.v,30237,2014-06-14
........\ddr2_controller_advisor.ipa,61089,2014-06-14
........\ddr2_controller_alt_mem_ddrx_controller_top.v,41396,2014-06-14
........\ddr2_controller_bb.v,3050,2014-06-14
........\ddr2_controller_controller_phy.v,15517,2014-06-14
........\ddr2_controller_example_driver.v,33609,2014-06-14
........\ddr2_controller_example_top.sdc,162,2014-06-14
........\ddr2_controller_example_top.v,6989,2014-06-14
........\ddr2_controller_example_top.v.tmp2,6989,2014-06-14
........\ddr2_controller_example_top_1.v,6989,2014-06-14
........\ddr2_controller_ex_lfsr8.v,1404,2014-06-14
........\ddr2_controller_phy.bsf,12882,2014-06-14
........\ddr2_controller_phy.html,7985,2014-06-14
........\ddr2_controller_phy.qip,2960,2014-06-14
........\ddr2_controller_phy.v,30983,2014-06-14
........\ddr2_controller_phy_alt_mem_phy.v,186489,2014-06-14
........\ddr2_controller_phy_alt_mem_phy_pll.qip,333,2014-06-14
........\ddr2_controller_phy_alt_mem_phy_pll.v,23200,2014-06-14
........\ddr2_controller_phy_alt_mem_phy_pll.v_.bak,16613,2014-06-14
........\ddr2_controller_phy_alt_mem_phy_pll_bb.v,18184,2014-06-14
........\ddr2_controller_phy_alt_mem_phy_seq.vhd,648510,2014-06-14
........\ddr2_controller_phy_alt_mem_phy_seq_wrapper.v,20032,2014-06-14
........\ddr2_controller_phy_autodetectedpins.tcl,1172,2014-06-14
........\ddr2_controller_phy_bb.v,3879,2014-06-14
........\ddr2_controller_phy_ddr_pins.tcl,60103,2014-06-14
........\ddr2_controller_phy_ddr_timing.sdc,34196,2014-06-14
........\ddr2_controller_phy_ddr_timing.tcl,3238,2014-06-14
........\ddr2_controller_phy_report_timing.tcl,20091,2014-06-14
........\ddr2_controller_phy_report_timing_core.tcl,85108,2014-06-14
........\ddr2_controller_phy_summary.csv,1340,2014-06-14
........\ddr2_controller_pin_assignments.tcl,18045,2014-06-14
........\ddr2_high_performance_controller-library
........\........................................\auk_ddr_hp_controller.ocp,488,2014-06-14
........\greybox_tmp
........\...........\cbx_args.txt,383,2014-06-14
........\IIC_CONTROLLER_hw.tcl,4703,2014-10-08
........\IIC_CONTROLLER_hw.tcl~,6281,2014-10-08
........\incremental_db
........\..............\compiled_partitions
........\..............\...................\vip.autoh_e40e1.map.cdb,17229,2015-01-17
........\..............\...................\vip.autoh_e40e1.map.dpi,2102,2015-01-17
........\..............\...................\vip.autoh_e40e1.map.hdb,203789,2015-01-17
........\..............\...................\vip.autoh_e40e1.map.kpt,2860,2015-01-17
........\..............\...................\vip.autoh_e40e1.map.logdb,4,2015-01-17
........\..............\...................\vip.db_info,140,2014-06-12
........\..............\...................\vip.root_partition.cmp.ammdb,8539,2015-01-17
........\..............\...................\vip.root_partition.cmp.cdb,399943,2015-01-17
........\..............\...................\vip.root_partition.cmp.dfp,33,2015-01-17
........\..............\...................\vip.root_partition.cmp.hdb,242330,2015-01-17
........\..............\...................\vip.root_partition.cmp.logdb,1100,2015-01-17
........\..............\...................\vip.root_partition.cmp.rcfdb,560003,2015-01-17
........\..............\...................\vip.root_partition.map.cdb,353375,2015-01-17
........\..............\...................\vip.root_partition.map.dpi,42619,2015-01-17
........\..............\...................\vip.root_partition.map.hbdb.cdb,2745,2015-01-17
........\..............\...................\vip.root_partition.map.hbdb.hb_info,51,2015-01-17
........\..............\...................\vip.root_partition.map.hbdb.hdb,229252,2015-01-17