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系统设计
说明: 基于PCF8591数模转换和DDS技术的信号发生器系统设计(Design of Signal Generator System Based on PCF8591 Digital-to-Analog Conversion and DDS Technology)
- 2020-06-21 02:20:01下载
- 积分:1
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zidongmen1
控制步进电机转动,正反转,旋转角度完美掌握。很好用,亲测(Control stepping motor rotation, positive and negative rotation, perfect control of rotation angle. Very easy to use, personal test)
- 2018-12-25 16:41:07下载
- 积分:1
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Datasheets
关于ALTERA DE2板上的文档资料,包括应用实例,用户文档和板上常用器件的技术文档(datasheets of ALTERA DE2)
- 2010-03-10 10:14:08下载
- 积分:1
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XAPP134_SDRAM_VHDL
XAPP134 SDRAM VHDL design file
- 2011-01-19 09:57:21下载
- 积分:1
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FPGAdesignXilinx
华为内部资料,关于FPGA设计的详细过程介绍,很不错的。本文档从FPGA器件结构出发以速度路径延时大小和面积资源占用率为主题描述在FPGA设计过程中应当注意的问题和可以采用的设计技巧。(Huawei internal information, with regard to detailed FPGA design process of introduction, it is good. This document from the FPGA device structure in order to speed the path delay and area the size of the theme of the occupancy rate of resource description in the FPGA design process should pay attention to the problems and design techniques can be used.)
- 2020-12-21 13:59:08下载
- 积分:1
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一个小液晶的程序。我没写。我只负责设计。
一个液晶灯的小程序。我没有写信。我只负责调试。适用于ACEXEP1K30QC208-3。我运行模拟器,标记连接销。我接下来在电路板上试了试,没有问题。实验中使用的板兄弟把CLK1的TESTOUT3改成了合唱或0。新人在线帮助是每个人的责任。
- 2022-02-09 15:34:18下载
- 积分:1
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this is a verilog code about serial transmit receive.
this a verilog code about serial transmit receive.-this is a verilog code about serial transmit receive.
- 2022-11-29 07:45:03下载
- 积分:1
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FPGA_GFP
基于FPGA的GFP(通用成帧协议)封装数据成帧的实现。(FPGA-based GFP (Generic Framing Protocol) encapsulated data Framing realized.)
- 2007-07-20 15:07:59下载
- 积分:1
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nerualnetwork
本文为通信专业硕士研究生的毕业论文。主要研究神经网络的FPGA实现及其在网络拥塞控制中的应用。
(In this paper, for the communications professional Master s thesis. Major study of the FPGA realization of neural networks and its application in network congestion control applications.)
- 2008-12-14 01:37:03下载
- 积分:1
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multifreqvhdl
说明: 资料是本人根据相关文献资料用vhdl语言编写的旋转机械鉴相信号倍频的程序,multifre1.vhd是倍频程序,multifre1.vwf是仿真波形文件,stp1.stp是虚拟逻辑分析仪signaltap文件。该倍频程序可以直接使用,可以设置倍频数,修改实体参数N即可。(According to the literature data is the information I have written in with vhdl Rotating Machinery Kam believe that the procedure multiplier number, multifre1.vhd is the multiplier process, multifre1.vwf is the simulation waveform files, stp1.stp a virtual logic analyzer signaltap file. The multiplier process can be used directly, you can set the multiplier number, modify the parameter N can be solid.)
- 2010-04-26 16:05:18下载
- 积分:1