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FPGA development board to write the Verilog code: function is from the client co...
FPGA开发板上写的Verilog代码：
功能是从电脑端发送一个字节，然后把它接收回来。
-FPGA development board to write the Verilog code: function is from the client computer sends a byte, and then receive it back.
- 2022-03-17 03:39:34下载
- 积分：1
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duishuizhtai
matlab 并行程序parfor用法matlab 并行程序parfor用法(matlab 并行程序parfor具体用matlab 并行程序parfor用法)
- 2020-07-03 17:40:02下载
- 积分：1
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rs-codec(255-223)
RS编码是一种纠错码，本程序实现RS（255，223）用FPGA 实现RS编码，程序在Quartus II中调试通过。(RS coding is an error-correcting codes, the procedures for the realization of RS (255,223) with FPGA realization of RS codes, in the Quartus II program through the debugger.)
- 2021-05-13 00:30:02下载
- 积分：1
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uart
UART串口的verilog源代码，完全正确...........(UART serial Verilog source code, completely correct ...........)
- 2009-03-02 14:44:16下载
- 积分：1
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dac9747
主要完成ADI公司的DAC（数字-模拟转换器）AD9747的SPI接口及寄存器配置(Mainly to complete ADI' s DAC (digital- analog converter) SPI interface to configure the AD9747 and the register of)
- 2014-06-03 11:00:43下载
- 积分：1
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SASX
说明： Use of Kalman and EKF on two-phase permanent magnet synchronous motor of the state estimate CDCDCDCDCCC
- 2020-06-24 11:40:02下载
- 积分：1
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- 2022-01-25 14:18:53下载
- 积分：1
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用VHDL语言编写的实现8位数据的并串转换，可下载在FPGA中
用VHDL语言编写的实现8位数据的并串转换，可下载在FPGA中-VHDL language with the realization of an 8-bit data, and the string conversion, can be downloaded in the FPGA in
- 2022-04-15 10:43:06下载
- 积分：1
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FM radio decoder and controller VHDL, Xilinx provide. I thank other.
FM收音机的解码及控制器VHDL语言实现，Xilinx提供的．别谢我．-FM radio decoder and controller VHDL, Xilinx provide. I thank other.
- 2022-10-05 04:50:03下载
- 积分：1
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HEX_DISPLAY
Simple vhdl description to show numbers on 7-segment s on Altera DE2 board.
- 2010-02-13 21:09:15下载
- 积分：1
