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FIR filter basic verilog code for implementation
FIR filter basic verilog code for implementation-FIR filter basic verilog code for implementation
- 2023-05-26 11:10:02下载
- 积分：1
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这是一个FPGA
这个是一个基于FPGA的数字图像的整数DCT变换程序，程序高性能地实现了2维DCT变换。-This is an FPGA-based digital image of the integer DCT transform process and procedures to achieve high-performance 2-D DCT transform.
- 2023-04-23 13:25:03下载
- 积分：1
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FFT
很好的fft学习程序感兴趣的同学可以看哈，下载一下。(it is very good )
- 2012-04-04 16:00:42下载
- 积分：1
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synchronous serial data transmission circuit SSDT the basic function is to conve...
同步串行数据发送电路SSDT的基本功能是将并行数据转换成串行数据并进行同步发送。系统写入和读出时序完全兼容Intel8086时序。
系统以同步信号开始连续发送四个字节，在发送中出现5个1时插入一个0，在四个数据发送结束而下一次同步没有开始之前，发送7FH，这时中间不需要插入零
-synchronous serial data transmission circuit SSDT the basic function is to convert parallel data into serial and the same this step. System write and read sequential fully compatible Intel8086 timing. Synchronized signal system to start sending four consecutive bytes, in this emerging 5 1:00 insert a 0, at the end of four data sent and the next synchronization not started before, sending seven FH, then the middle is not inserted
- 2022-03-21 08:08:19下载
- 积分：1
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I write the digital phase
本人写的数字锁相环，有模拟数据，学习锁相环很好的材料。参考书“数字锁相环路原理与应用”编写。-I write the digital phase-locked loop, have simulated data, a good phase-locked loop learning materials. Reference book
- 2023-04-23 05:25:03下载
- 积分：1
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单周期cpu
说明： 该文件包含了实现单周期cpu的全部代码以及实验报告，包括仿真波形以及烧板过程(This file contains all the codes and experimental reports of realizing single cycle CPU, including simulation waveform and download process)
- 2019-12-14 20:55:42下载
- 积分：1
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不错的介绍verilog的电子文档，对于入门级的新手有不错的参考价值...
不错的介绍verilog的电子文档，对于入门级的新手有不错的参考价值-A good introduction to verilog electronic documents, for the novice there is a good entry-level reference value
- 2023-03-11 23:45:04下载
- 积分：1
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实光电码盘的输出数据的四倍频，使码盘输出精度提高四倍。...
实光电码盘的输出数据的四倍频，使码盘输出精度提高四倍。-real photoelectric encoder output data of the four frequency, accuracy encoder output increased by four times.
- 2022-01-23 10:41:40下载
- 积分：1
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DDR SDRAM控制器的VHDL代码
DDR SDRAM控制器的VHDL代码已经测试-DDR SDRAM controller VHDL code
- 2022-02-24 20:41:05下载
- 积分：1
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Signed-Arithmetic-in-Verilog-2001
有符号数的完整讲义和例子Verilog 2001(Signed Arithmetic in Verilog 2001, paper with examples)
- 2011-01-18 17:15:09下载
- 积分：1
