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openmips
一个开源mips处理器verilog 源码(wishbone interface wishbone interface)
- 2020-08-16 15:48:32下载
- 积分:1
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基于FPGA的视频图像加密系统
DE2_70_D5M_key_video_encryption
基于FPGA的视频图像加密系统 DE2_70+TRDB—D5M+VGA(FPGA-based video encryption system DE2_70+TRDB-D5M+VGA)
- 2014-06-01 13:43:14下载
- 积分:1
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SPITX16
基于状态机的优秀SPI输出程序(以DAC7512为基础,可修改)(VHDL code about SPI)
- 2016-02-09 01:07:52下载
- 积分:1
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maichongceliang
对于已获得的脉冲包络采样序列,需测量的脉冲特征参数主要有:脉冲幅值(PA)、脉冲到达时间(TOA)和脉冲宽度(PW)。实际测量中,脉冲波形的形状是各种各样的,但其主要的参数有脉冲幅度、脉冲宽度、脉冲周期、脉冲占空比、脉冲前沿(上升时间)、脉冲后沿(下降时间)、脉冲上冲、脉冲下冲、脉冲下垂、脉冲顶部不平度等,脉冲参数的计量主要就是对这些参数进行计量。本程序包实现基于FPGA实现脉冲宽度和重复周期的测量。(Who have access to the pulse envelope sample sequence, the pulse measurement to be the main characteristic parameters are: pulse amplitude (PA), pulse time of arrival (TOA) and pulse width (PW). The actual measurement, the pulse shape is a wide variety of shapes, but its main parameters of the pulse amplitude, pulse width, pulse period, pulse duty cycle, pulse leading edge (rise time), pulse along (down time), the red pulse, pulse undershoot, pulse droop, pulse irregularities, such as at the top, the measurement of pulse parameters is mainly the measurement of these parameters. The package FPGA-based pulse width and repetition to achieve the measurement cycle.)
- 2009-07-08 14:32:08下载
- 积分:1
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mission
基于FPGA和Matlab的均衡滤波器设计与实现
基于MATLAB的数字均衡器的设计
采用FPGA实现基于LMS算法的自适应均衡器的设计研究
PWM控制的FPGA实现
等众多与FPGA、MATLAB相关的滤波器和均衡器设计
( FPGA and MATLAB design of filter&EQ)
- 2016-04-03 12:37:42下载
- 积分:1
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md5
MD5 算法在Xilinx FPGA上的实现,希望对大家有用。(MD5 algorithm in Xilinx FPGA Implementation, in the hope that useful to everyone.)
- 2021-04-19 15:18:51下载
- 积分:1
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NCO of the VHDL process is the use of nuclear
NCO的VHDL程序,是利用IP核生成的,超好的,快下吧-NCO of the VHDL process is the use of nuclear-generated IP, super good, fast, are you
- 2022-03-22 15:41:09下载
- 积分:1
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Divider-vhdl
This is a divider, which is depicted as well.
It is a programming language Vhdl.
- 2013-09-29 18:28:11下载
- 积分:1
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九九乘法器
基于对ROM的编写,在quartusII上实现九九乘法器的实现,在试验箱的四个数码管上分别显示乘数,被乘数,积
- 2022-02-03 19:00:51下载
- 积分:1
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fir滤波器,Verilog语言写的,容易看懂
fir滤波器,Verilog语言写的,容易看懂-fir filter, Verilog language written in easy to understand
- 2023-03-26 01:30:04下载
- 积分:1