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robust_fir_latest.tar
滤波器 Generaic FIR Filter(Generaic FIR Filter)
- 2011-11-17 15:51:23下载
- 积分：1
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半加器
半加器使用Verilog编码用于Xillinx
- 2022-02-25 13:50:25下载
- 积分：1
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SVPWM_FPGA_ContainSourceCode
广东工业大学硕士论文《SVPWM算法优化及其FPGA/CPLD实现》，在详细分析经典SVPWM算法基础上，提出一种优化算法，并在FPGA上实现。论文附录包含VHDL源码。(Guangdong University Thesis " SVPWM algorithm to optimize its FPGA/CPLD realization" in the detailed analysis of the classical SVPWM algorithm is proposed based on an optimization algorithm, and implemented on FPGA. Paper appendix contains VHDL source code.)
- 2013-12-30 16:00:11下载
- 积分：1
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LCD_test
this a example for the LCD for altera FPGA cyclone ii EP2C8. implemented in verilog. tested using altera EP2C8 fpga
- 2013-07-25 14:43:43下载
- 积分：1
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64point_FFT
64点FFT代码 基4算法 Verilog(64-point FFT code radix-4 algorithm Verilog)
- 2021-01-15 09:48:46下载
- 积分：1
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VHDL
EDA技术以EDA软件工具为开发环境，以可编程逻辑器件为实验载体，实现源代码编程和仿真功能。VHDL作为一种标准化的硬件描述语言用于描述数字系统的结构、行为、功能和接口。本设计提出了一种基于VHDL语言的编码器和译码器的实现方法。编码器与译码器是计算机电路中基本的器件，本课程设计采用EDA技术设计编码和译码器。编码器由8线-3线优先编码器作为实例代表，译码器则包含3线-8线译码器和2线-4线译码器两个实例模块组成。课程设计采用硬件描述语言VHDL把电路按模块化方式进行设计，然后进行编程、时序仿真和分析等。课程设计结构简单，使用方便，具有一定的应用价值。
(EDA technology take the EDA software as tools for the development of the environment,programmable logic devices in experimental carrier,the realiztion of the source code programming and simulation. The VHDL as a standardized hardware description language used to describe the struction of digital systems,behavior,function and interface. The paper proposes a method for encoder and decoder based on the VHDL language.Encoder and decoder is a basic computer circuit devices.This Curriculum design by EDA design encoder and decoder.Encoders from 8- 3 priority encoder for example,and decoder includes 3- 8 decoder and the 2- 4 examples of the two decoder modules.And then to program, the timing simulation and analysis.Curriculum design, simple structure, easy to use and has a value.)
- 2011-06-22 21:23:30下载
- 积分：1
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给予内部晶振对外部时间码校正模块
对于不同竞争可能出现的偏差，采用修改计数方式对多个设备时间码进行修正，时最后输出时间码时同步的，精度可以达到10的付8次方
- 2022-01-26 05:02:59下载
- 积分：1
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agc_gen2
AGC(自动增益放大) Verilog代码 设计可以参考 第二部分(AGC (automatic gain control) can refer to the Verilog code design
)
- 2015-04-14 01:17:31下载
- 积分：1
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Ddiggitalfiili
数字滤波器的C语言实现，，包含高通、低通、带通滤波器
(The C language implementation of the digital filter, including the high-pass, low pass, band-pass filter)
- 2020-07-03 01:40:01下载
- 积分：1
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m5441x
support for Coldfire m5441x processors.
- 2014-09-19 16:13:50下载
- 积分：1
