-
inv_matrix
矩阵求逆模块硬件实现,用verilog语言,基于ISE开发环境(implement of inverse matrix)
- 2021-03-24 10:19:14下载
- 积分:1
-
ideal_6pulse
理想三相转单相 基于 spwm 的逆变器,可调(Ideal three-phase switch to a single the phase based spwm inverter)
- 2012-11-04 21:15:32下载
- 积分:1
-
VerilogFreq-div
Verilog分频程序原理讲解及代码.偶数倍分频奇数倍分频的原理和方法(Verilog divide the program explain the principle and code an even multiple of odd multiple of the principle of divide and divide)
- 2013-01-21 21:45:08下载
- 积分:1
-
dfilpflop in behavioural
我们在vcs synopsys tools中设计了d触发器,代码是以行为模式编写的;
- 2022-01-25 21:37:57下载
- 积分:1
-
i2c-configure-SAA7113
i2c配置SAA7113,非常有用的程序,做视频采集类必看(i2c configure SAA7113)
- 2013-12-25 16:37:37下载
- 积分:1
-
sobel
这是本人自己编写的可用于256*256大小的图像进行sobel边缘检测的vhd文件,可在QuartusII或MaxplisII下综合和仿真,并在FPGA上测试过。可以进行修改支持其他大小图像的sobel边缘检测,同时还可以实现其它的图像模块化处理算法,例如高斯滤波,平滑等。(this is my own preparation for the 256* 256 size of the image segmentation Edge Detection vhd document in the next QuartusII or MaxplisII integrated and simulation, and the FPGA tested. Can be adapted to support other size image segmentation edge detection, It can also achieve other modular image processing algorithms, such as Gaussian filtering, smoothing and so on.)
- 2020-07-09 21:08:55下载
- 积分:1
-
DC_EX verilog 实现
pipeline 的基础,用于各种technique 的 test bench.
- 2022-02-14 05:22:35下载
- 积分:1
-
DDS
说明: 使用Verilog,以Quartus II 为平台,编写了一个DDS信号发生器程序。(Using Verilog and Quartus II as the platform, realizing the DDS signal generator program .)
- 2020-11-26 17:12:26下载
- 积分:1
-
svpwm3
基於空間向量調變的開關法,在於載波做比較切出方波再送至開關讓馬達啟動(Based on the switching method of space vector modulation, the square wave is cut out for carrier comparison and sent to the switch to start the moto)
- 2019-01-04 16:07:37下载
- 积分:1
-
static-timing-analyze
特权同学主讲的FPGA设计的时序约束专题(STA部分)(Speaker privileged classmates timing constraints for FPGA design topics (STA section))
- 2013-07-11 13:23:46下载
- 积分:1