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ADC-Parameter
外部ADC采集数据,存为数组文件。通过程序读入,然后即可求出ADC的SNR、SINAD、THD、ENOB等。(External ADC data collection, stored as an array of documents. Read through the program, then the ADC SNR, SINAD, THD, ENOB can be calculated.)
- 2021-03-15 21:39:22下载
- 积分:1
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中山大学计组实验--单周期CPU设计
中山大学计组实验--单周期CPU设计,实现12条指令,基于xilinx ISE 14.4 测试通过
- 2022-03-21 15:15:11下载
- 积分:1
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pwm_smg_display
说明: 用三个按键控制pwm输出
key0控制是选着显示/改变频率或占空比
key1控制增加
key2控制减少
数码管显示频率或占空比
频率单位默认Hz(500-20KHz)
占空比范围(0.1-0.9)(Control PWM output with three keys
Key0 controls display/change frequency or duty cycle optionally
Key1 controls the increase
Key2 controls are reduced
Digital tube display frequency or duty ratio
Frequency unit default Hz (500-20khz)
Duty cycle range (0.1-0.9))
- 2020-06-17 15:42:35下载
- 积分:1
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fpgaConfig_V1_2_SFLASH_20090507a
自己写的一个使用单片机配置FPGA的下位机C代码,使用一个C8051F330,外置SPI FLASH,通过串口可将程序写入FLASH,上电时自动加载到FPGA完成配置。(Wrote it myself, using a microcontroller to configure FPGA code for the next bit plane C, using a C8051F330, external SPI FLASH, the program is written through the serial port can be FLASH, power-on automatically loaded into the FPGA to complete the configuration.)
- 2021-02-16 07:29:47下载
- 积分:1
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FPGA基于verilog语言的pll数字锁相环
应用背景pll数字锁相环在FPGA中具有很重要的作用,在提取信号同步时钟等方面都有应用。关键技术FPGA的PLL数字锁相环的实现基于verilog语言,采用鉴相器、滤波、数控振荡器、分频器的结构进行实现。
- 2022-02-02 05:35:33下载
- 积分:1
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DDR3_256MByte
说明: 基于K7的FPGA的DDR3读写程序,通过串口发送1024位的数据,写到FPGA的DDR3端,然后将数据从DDR3中读取出来,通过串口发送到PC端。(The DDR3 reading and writing program of FPGA based on K7 sends 1024 bit data to DDR3 end of FPGA through serial port, then reads data from DDR3 and sends it to PC through serial port.)
- 2021-02-22 15:19:41下载
- 积分:1
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multiplexersemultiplexer
this project is based on 2*1 and 4*1 multiplexer and 1*2 and 1*4 demultiplexer using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering.
Here dataflow techniques and behavioural
- 2009-12-21 18:11:27下载
- 积分:1
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8 位加法器 verilog
嘿,这里是 ise 格式代码为 xilinx 软件 verilog 的 8 位固定点编码使用此编码与测试工作台为例
- 2022-07-01 13:04:00下载
- 积分:1
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rough22
采用倍频及1/3、1/12倍频绘制的路面不平度频谱图(自编)(Using octave and 1/3, 1/12 octave drawn road roughness spectrum (self))
- 2013-09-10 16:50:13下载
- 积分:1
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编码器信号转换程序
编码器信号的转换,用于控制打印机,UV平板打印机的喷头驱动输出信号,控制Y轴移动,需要将信号转换为运动控制器识别的信号才可以控制其运动。
- 2022-10-20 19:55:03下载
- 积分:1