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anjian_xd

于 2020-06-19 发布 文件大小:170KB
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代码说明：

  Verilog实现按键消抖，工程，已下板验证通过。(Verilog achieves keystroke jitter elimination. The project has been validated on the lower board.)

文件列表：

anjian_xd, 0 , 2018-03-12
anjian_xd\doc, 0 , 2019-08-04
anjian_xd\prj, 0 , 2018-03-12
anjian_xd\prj\anjian_xd.qpf, 1276 , 2018-03-12
anjian_xd\prj\anjian_xd.qsf, 3155 , 2018-03-12
anjian_xd\prj\anjian_xd.qws, 3256 , 2018-03-12
anjian_xd\prj\db, 0 , 2018-03-12
anjian_xd\prj\db\anjian_xd.(0).cnf.cdb, 1200 , 2018-03-12
anjian_xd\prj\db\anjian_xd.(0).cnf.hdb, 819 , 2018-03-12
anjian_xd\prj\db\anjian_xd.(1).cnf.cdb, 1303 , 2018-03-12
anjian_xd\prj\db\anjian_xd.(1).cnf.hdb, 822 , 2018-03-12
anjian_xd\prj\db\anjian_xd.(2).cnf.cdb, 2338 , 2018-03-12
anjian_xd\prj\db\anjian_xd.(2).cnf.hdb, 925 , 2018-03-12
anjian_xd\prj\db\anjian_xd.(3).cnf.cdb, 5036 , 2018-03-12
anjian_xd\prj\db\anjian_xd.(3).cnf.hdb, 1128 , 2018-03-12
anjian_xd\prj\db\anjian_xd.cbx.xml, 91 , 2018-03-12
anjian_xd\prj\db\anjian_xd.cmp.rdb, 6922 , 2018-03-12
anjian_xd\prj\db\anjian_xd.cmp_merge.kpt, 210 , 2018-03-12
anjian_xd\prj\db\anjian_xd.db_info, 140 , 2018-03-12
anjian_xd\prj\db\anjian_xd.hier_info, 4928 , 2018-03-12
anjian_xd\prj\db\anjian_xd.hif, 706 , 2018-03-12
anjian_xd\prj\db\anjian_xd.ipinfo, 163 , 2018-03-12
anjian_xd\prj\db\anjian_xd.lpc.html, 1626 , 2018-03-12
anjian_xd\prj\db\anjian_xd.lpc.rdb, 519 , 2018-03-12
anjian_xd\prj\db\anjian_xd.lpc.txt, 2616 , 2018-03-12
anjian_xd\prj\db\anjian_xd.map.ammdb, 129 , 2018-03-12
anjian_xd\prj\db\anjian_xd.map.bpm, 678 , 2018-03-12
anjian_xd\prj\db\anjian_xd.map.cdb, 9443 , 2018-03-12
anjian_xd\prj\db\anjian_xd.map.hdb, 13203 , 2018-03-12
anjian_xd\prj\db\anjian_xd.map.kpt, 2489 , 2018-03-12
anjian_xd\prj\db\anjian_xd.map.logdb, 4 , 2018-03-12
anjian_xd\prj\db\anjian_xd.map.qmsg, 8498 , 2018-03-12
anjian_xd\prj\db\anjian_xd.map.rdb, 1364 , 2018-03-12
anjian_xd\prj\db\anjian_xd.map_bb.cdb, 1870 , 2018-03-12
anjian_xd\prj\db\anjian_xd.map_bb.hdb, 9320 , 2018-03-12
anjian_xd\prj\db\anjian_xd.map_bb.logdb, 4 , 2018-03-12
anjian_xd\prj\db\anjian_xd.npp.qmsg, 2119 , 2018-03-12
anjian_xd\prj\db\anjian_xd.pre_map.hdb, 11839 , 2018-03-12
anjian_xd\prj\db\anjian_xd.pti_db_list.ddb, 246 , 2018-03-12
anjian_xd\prj\db\anjian_xd.root_partition.map.reg_db.cdb, 530 , 2018-03-12
anjian_xd\prj\db\anjian_xd.rtlv.hdb, 11667 , 2018-03-12
anjian_xd\prj\db\anjian_xd.rtlv_sg.cdb, 7770 , 2018-03-12
anjian_xd\prj\db\anjian_xd.rtlv_sg_swap.cdb, 841 , 2018-03-12
anjian_xd\prj\db\anjian_xd.sgate.nvd, 11000 , 2018-03-12
anjian_xd\prj\db\anjian_xd.sgate_sm.nvd, 2146 , 2018-03-12
anjian_xd\prj\db\anjian_xd.sld_design_entry.sci, 277 , 2018-03-12
anjian_xd\prj\db\anjian_xd.sld_design_entry_dsc.sci, 277 , 2018-03-12
anjian_xd\prj\db\anjian_xd.smart_action.txt, 5 , 2018-03-12
anjian_xd\prj\db\anjian_xd.smp_dump.txt, 266 , 2018-03-12
anjian_xd\prj\db\anjian_xd.tis_db_list.ddb, 246 , 2018-03-12
anjian_xd\prj\db\logic_util_heursitic.dat, 0 , 2018-03-12
anjian_xd\prj\db\prev_cmp_anjian_xd.qmsg, 5558 , 2018-03-12
anjian_xd\prj\incremental_db, 0 , 2018-03-12
anjian_xd\prj\incremental_db\README, 653 , 2018-03-12
anjian_xd\prj\incremental_db\compiled_partitions, 0 , 2018-03-12
anjian_xd\prj\incremental_db\compiled_partitions\anjian_xd.db_info, 140 , 2018-03-12
anjian_xd\prj\incremental_db\compiled_partitions\anjian_xd.root_partition.map.cdb, 9167 , 2018-03-12
anjian_xd\prj\incremental_db\compiled_partitions\anjian_xd.root_partition.map.dpi, 1059 , 2018-03-12
anjian_xd\prj\incremental_db\compiled_partitions\anjian_xd.root_partition.map.hbdb.cdb, 1446 , 2018-03-12
anjian_xd\prj\incremental_db\compiled_partitions\anjian_xd.root_partition.map.hbdb.hb_info, 46 , 2018-03-12
anjian_xd\prj\incremental_db\compiled_partitions\anjian_xd.root_partition.map.hbdb.hdb, 12941 , 2018-03-12
anjian_xd\prj\incremental_db\compiled_partitions\anjian_xd.root_partition.map.hbdb.sig, 32 , 2018-03-12
anjian_xd\prj\incremental_db\compiled_partitions\anjian_xd.root_partition.map.hdb, 12947 , 2018-03-12
anjian_xd\prj\incremental_db\compiled_partitions\anjian_xd.root_partition.map.kpt, 2462 , 2018-03-12
anjian_xd\prj\output_files, 0 , 2018-03-12
anjian_xd\prj\output_files\anjian_xd.done, 26 , 2018-03-12
anjian_xd\prj\output_files\anjian_xd.flow.rpt, 7666 , 2018-03-12
anjian_xd\prj\output_files\anjian_xd.map.rpt, 34620 , 2018-03-12
anjian_xd\prj\output_files\anjian_xd.map.summary, 521 , 2018-03-12
anjian_xd\rtl, 0 , 2018-03-12
anjian_xd\rtl\anjian_xd_top.v, 560 , 2018-03-12
anjian_xd\rtl\anjian_xd_top.v.bak, 196 , 2018-03-12
anjian_xd\rtl\delay_module.v, 1405 , 2018-03-10
anjian_xd\rtl\detect_module.v, 1084 , 2018-03-10
anjian_xd\rtl\key_xd.v, 672 , 2018-03-10
anjian_xd\testbench, 0 , 2019-08-04

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