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fulladd
this files in Quartus2 are fulladder
- 2016-05-17 16:38:42下载
- 积分：1
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goodProcessor.srcs
说明： 处理器系统，处理器加上存储器，从存储器取出指令放入处理器执行(processor system, instructions stored in ROM, a counter generate address and the processor execute instructions.)
- 2020-10-10 23:10:02下载
- 积分：1
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vhdl 语言代码多路复用器
multiplexerwe 的 vhdl 程序可以写也像 thisits 非常简单的代码为 beginers 了解 4： 1 多路复用器
- 2023-04-22 00:05:03下载
- 积分：1
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Top module name : SHIFTER (File name : SHIFTER.v)
2. Input pins: SHIFT [3:0],...
Top module name : SHIFTER (File name : SHIFTER.v)
2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT.
3. Output pins: OUT [15:0].
4. Input signals generated from test pattern are latched in one cycle and are
synchronized at clock rising edge.
5. The SHIFT signal describes the shift number. The shift range is 0 to 15.
6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it
shifts input data to left.
7. When the signal SIGN is high, the input data is a signed number and it shifts with
sign extension. However, the input data is an unsigned number if the signal SIGN
is low.
8. You can only use following gates in Table I and need to include the delay
information (Tplh, Tphl) in your design.
- 2022-04-13 06:40:15下载
- 积分：1
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DDS
DDS的VHDL源代码，是数字QPSK调制解调中的重要组成部分。(DDS of the VHDL source code, the number of QPSK modulation and demodulation is an important part.)
- 2007-12-11 16:26:33下载
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8. For the key to enter a password lock, assuming that reset after the seven lam...
8对于输入密码锁的键，假设重置后七个灯显示" 0"，并且使用sw1、sw2、sw3 3，只需按任意sw1、sw2、sw3，将使七个灯显示值相加" 1
- 2022-07-16 11:58:58下载
- 积分：1
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MP3-coder
In this design, it is assumed that a buffer sized as 1024x8 bits provides main data including scale factors and Huffman code bits to Huffman decoder.
Also, it is assumed that a memory with 1024x8 bits is ready for each component to write or read the output or input 576 frequency lines.(This folder contains three directories: Huffman, IMDCT and Filterbank, each of them
includes all the VHDL source codes of the component.)
- 2013-08-06 15:40:24下载
- 积分：1
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bcd_to_dec
VHDL code for converting BCD to Decimal
- 2018-02-13 09:45:16下载
- 积分：1
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FPGA源代码
FPGA部分源代码，关于dsp48的应用，从一本很好的书上下的
- 2023-06-23 15:05:04下载
- 积分：1
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BT656_RGB
BT656转RGB的算法实现代码，使用VORILOG语言编写(BT656-->RGB, verilog)
- 2021-02-24 09:39:39下载
- 积分：1
