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It is then register ( shifter) PISO ( Parallel
It is then register ( shifter) PISO ( Parallel - in, serial - out)-It is then register ( shifter) PISO ( Parallel- in, serial- out)
- 2022-03-14 08:29:42下载
- 积分：1
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progconterful
four bit counter verlog source code for veriwell including test bench
- 2010-03-29 18:54:45下载
- 积分：1
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ADC_Data_Recv_Module
接收机测试输入信号，
生成正余弦波，采样率、频率、幅度、相位可调节
并将生成的数据进行输出
压缩包包括Verilog代码、testbench代码、word文档
matlab仿真代码(The receiver tests the input signal,
Generation of positive cosine wave, sampling rate, frequency, amplitude, phase can be adjusted
And output the generated data
The compressed package includes the Verilog code, the testbench code
Matlab simulation code)
- 2017-12-08 17:56:02下载
- 积分：1
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VHDL的您的信息的一个游戏程序的源代码，我希望那些在…
一个游戏程序vhdl源码，供大家参考，希望有兴趣的人下载-VHDL source code of a game program for your information, I hope those who are interested in downloading
- 2022-03-19 17:54:49下载
- 积分：1
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ads7846
四线电阻式触摸屏，ads7846控制显示触摸坐标(Four-wire Resistive Touch Panel, ads7846 touch control display coordinates)
- 2009-03-31 20:07:16下载
- 积分：1
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用verilog写的，基于查表法实现的LOG10运算器，在Altera FPGA中应用。...
用verilog写的，基于查表法实现的LOG10运算器，在Altera FPGA中应用。-It is a verilog design of LOG10 calculation unit, which is based on LUT arithmatic. And it is applicated in Altera FPGA.
- 2022-08-17 06:30:14下载
- 积分：1
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gtx
ip core of the transceiver gtx
- 2019-04-02 00:10:03下载
- 积分：1
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本文件是周立功试验开发板的配套资料，容易学会
本文件是周立功试验开发板的配套资料，容易学会-This document is ZLG test development board supporting information, easy to learn
- 2023-03-21 03:05:05下载
- 积分：1
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This document is formatted UltraEdit document describes some of the original Ult...
这个文件中是UltraEdit的一些格式化文件说明
由于原来的 UltraEdit 不支持 HDL 语言的格式化显示，把文件解压得到的 wordfile.txt替换其安装目录下的 wordfile.txt 文件即可-This document is formatted UltraEdit document describes some of the original UltraEdit as a result of HDL does not support formatting language shows that the document received decompression wordfile.txt replace its installation directory under the document can wordfile.txt
- 2022-09-16 02:20:04下载
- 积分：1
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verilog写的数字频率计的控制模块,对程序进行控制
verilog写的数字频率计的控制模块,对程序进行控制-written in Verilog digital frequency meter control module, the program control
- 2022-02-04 00:52:27下载
- 积分：1
