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sed1335
design the connecter between dsp and sed12
- 2008-08-09 20:36:13下载
- 积分：1
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cpu
cache，实现了部分简单指令，仿真模拟确认可行(Single-cycle CPU, to achieve some simple instruction, simulation confirm feasible)
- 2015-01-05 14:11:10下载
- 积分：1
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QDPSKvhd
说明： 基于quartusII的QDPSK调制解调vhdl程序。(Modulation and demodulation based quartusII of QDPSK vhdl program.)
- 2010-04-23 17:30:53下载
- 积分：1
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yibuqingling
含异步清零和同步清零的计数器的设计，内容是源代码，以及相关文件，打开即可(Clear cleared asynchronous and synchronous with the counter design, content source code and related documents, can be opened)
- 2011-08-24 10:44:33下载
- 积分：1
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Lesson1
FPGA课件，个人感觉不错，希望对大家有帮助(FPGA software, personal feel good, I hope all of you help)
- 2009-06-13 10:27:35下载
- 积分：1
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ahdl--sine-wave-code-with-rom-look-up-table_imp
hi this is an verilog codes
- 2011-11-11 14:30:21下载
- 积分：1
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Verilogmanual
VERILOG语言速查手册,与VHDL齐名的另外一硬件描述语言(verilog language manuals, and the other enjoying VHDL hardware description language 1)
- 2007-03-01 13:29:04下载
- 积分：1
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fir在dspbuilder下产生VHDL源码及其测试激励文件时的matlab模型,在modelsim下仿真通过...
fir在dspbuilder下产生VHDL源码及其测试激励文件时的matlab模型,在modelsim下仿真通过-fir in dspbuilder VHDL source code under test and document the incentive mat lab model, the simulation under through modelsim
- 2023-07-19 00:45:03下载
- 积分：1
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CPU的VHDL设计代码
应用背景VHDL ；CPU设计...................................................................................................................................................................................................................................................................................................................................................................关键技术VHDL ；CPU设计...................................................................................................................................
- 2022-05-20 23:07:58下载
- 积分：1
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dds
基于DDS的信号源设计（包括三角波、正弦波、方波）(Design of signal source based on DDS)
- 2018-01-01 18:06:51下载
- 积分：1
