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pps_ketiao_rb2
说明: FPGA程序,使用Verilog语言生成1个脉冲可调的PPS脉冲信号。(FPGA program generates 1 PPS pulse signal, using Verilog language.)
- 2020-06-20 17:00:02下载
- 积分:1
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PID
利用VHDL语言实现PID控制,已经过调试验证。(Using VHDL language to implement PID control)
- 2018-04-30 16:33:39下载
- 积分:1
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spi_test
基于fpga的spi通信测试 可与stm32进行spi通信测试(SPI communication test based on FPGA can test SPI communication with stm32)
- 2020-06-20 21:00:01下载
- 积分:1
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OFDM
OFDM完美出图,信噪比,16QAM星座图,加窗信号时域和频域波形图(Perfect figure, OFDM SNR, 16 qam constellation diagram, add window signal time domain and frequency domain waveform figure)
- 2021-04-15 15:08:54下载
- 积分:1
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本程序为24小时计时器,稳定无误差。简单好用,是Verilog HDL语言初学者的指引。...
本程序为24小时计时器,稳定无误差。简单好用,是Verilog HDL语言初学者的指引。-This procedure for 24-hour timer, stable error-free. Easy-to-use, is the Verilog HDL language beginners guide.
- 2022-07-20 09:46:32下载
- 积分:1
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HDB3-VHDL-code
HDB3的VHDL语言描述,注释在文件内(HDB3 source code in VHDL)
- 2020-12-01 20:19:27下载
- 积分:1
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这是一个基本的ARM7_Core
有基本功能 但不是太完善
这是一个基本的ARM7_Core
有基本功能 但不是太完善-This is a basic ARM7_Core has the basic functions, but not too perfect
- 2022-01-26 06:35:06下载
- 积分:1
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VerilogHdlPracticeAndSystemDesign
本RAR包括《Verilog-HDL实践与应用系统设计》一书中的全部例子,这些例子全部通过了验证。第七章以后的设计实例,不仅有Verilog-HDL的例子,也附了包括VB、VC++等源程序,甚至将DLL的生成方法也详尽地作了说明。(The RAR includes " Verilog-HDL Practice and Application of system design," a book full of examples, all passed validation. Chapter VII of the future design examples, not only examples of Verilog-HDL, but also attached, including VB, VC++ source code, etc., and even DLL generation methods explained in detail.)
- 2009-11-10 19:40:12下载
- 积分:1
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sd_sdram_lcd
说明: sd_sdram_lcd
是读取SD卡中的数据,然后通过LCD显示(It is to read the data in SD card and display it by LCD)
- 2019-05-14 14:35:49下载
- 积分:1
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USB_xilinx_vhdl
Giao tiep Univesan ...
- 2020-06-20 03:00:02下载
- 积分:1