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程序
说明： 传感器是一种检测装置，能感受到被测量的信息，并能将感受到的信息，按一定规律变换成为电信号或其他所需形式的信息输出，以满足信息的传输、处理、存储、显示、记录和控制等要求(Sensor is a kind of detection device, which can sense the measured information and transform it into electrical signal or other required information output according to certain rules to meet the requirements of information transmission, processing, storage, display, recording and control.)
- 2020-06-18 22:00:01下载
- 积分：1
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ALU_74181_me
学习ALU的设计方法。
2、用HDL语言采用行为描述的方法完成74181的逻辑设计 。(Learn the design method of ALU.
2, use HDL language to use behavioral description method to complete 74181 logical design.)
- 2020-11-11 16:19:44下载
- 积分：1
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VHDL_COUNTING 与 4 使脉冲和使用 3 按钮了，下来，停止 （Mạch đếm với 4 xung ENA sử dụng 3 nút nhấn lên，xuống và dừng l
VHDL_COUNTING 与 4 使脉冲和使用 3 按钮了，下来，停止 （Mạch đếm với 4 xung ENA sử dụng 3 nút nhấn lên，xuống và dừng lại）
- 2022-03-19 05:46:27下载
- 积分：1
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mimasuo
密码锁 vhdl实现的密码锁 控制程序-mimasuo
- 2022-02-11 23:21:28下载
- 积分：1
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attachments_2010_01_29
dct and idct vhdl code
- 2010-03-24 23:08:41下载
- 积分：1
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fir48
48阶FIR滤波器的verilog，包含测试文件(48-order FIR filter verilog, including test paper)
- 2021-04-14 19:58:55下载
- 积分：1
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eDP
eDP接口TFT-LCD显示驱动原码（verilog+c）(eDP Interface TFT-LCD display driver source code (verilog+c))
- 2020-10-17 09:17:27下载
- 积分：1
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通过实例的VHDL程序设计
VHDL programming by example
- 2022-03-19 05:46:52下载
- 积分：1
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一个同步有限状态机（FSM）的设计是一个数字的共同任务…
Designing a synchronous finite state machine (FSM) is a common task for a digital
logic engineer. This paper discusses a variety of issues regarding FSM design using
Synopsys Design Compiler. Verilog and VHDL coding styles are presented, and
different methodologies are compared using real-world examples.
- 2022-01-26 02:12:10下载
- 积分：1
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biss
绝对位置编码器biss与FPGA之间的通信(Absolute position encoder biss communication with FPGA)
- 2017-08-04 12:10:13下载
- 积分：1
