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Verilog&Vhdl混语言对SDRAM的控制源代码，提供了很好的例子，顶层文件为sdrm.v！...
Verilog&Vhdl混语言对SDRAM的控制源代码，提供了很好的例子，顶层文件为sdrm.v！-VerilogVhdl mixed language SDRAM control of the source code, provided a good example of top-level documents sdrm.v!
- 2022-03-18 22:36:54下载
- 积分：1
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MAC
this is a Multiplier and Accumulate (MAC). written in VHDL
- 2010-08-09 23:40:46下载
- 积分：1
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sd_sdram_lcd
sd_sdram_lcd
是读取SD卡中的数据，然后通过LCD显示(It is to read the data in SD card and display it by LCD)
- 2019-05-14 14:35:49下载
- 积分：1
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8255参考设计VHDL源代码
8255参考设计VHDL源代码-The sound code of 8255 reference design based on VHDL
- 2022-05-31 03:46:31下载
- 积分：1
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VHDL 状态机的设计实例 ,不错的,对于搞清楚状态机是很有用的....
VHDL 状态机的设计实例 ,不错的,对于搞清楚状态机是很有用的.-VHDL state machine design examples, good for the state machine to figure out would be very useful.
- 2022-07-09 03:27:51下载
- 积分：1
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Driver-for--Agilent
本程序用以驱动安捷伦频谱仪和脉冲信号发生器，以产生格雷码波形。(It is aim to driver the PSG and ESA to generate Golay.)
- 2013-01-17 15:28:20下载
- 积分：1
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using VHDL keyboard scanning procedure can be slightly modified to use
使用VHDL键盘扫描程序，可以稍微修改一下使用
- 2022-03-05 17:56:26下载
- 积分：1
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myfir
verilog编写的16阶升余弦滤波器 采用直接型结构实现 对方波进行滤波 输出波形 含testbench文件(order raised cosine filter verilog written 16 direct-type structure to achieve the other wave filtering the output waveform containing testbench file)
- 2020-10-05 16:47:44下载
- 积分：1
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endat_c
说明： 用于读取海德汉绝对位置编码器的位置数据。ENDAT2.1接口(Read the data from ENDAT2.1)
- 2021-04-21 18:58:49下载
- 积分：1
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Triscend supports the use of the Model Technology ModelSim logic simulator for V...
Triscend supports the use of the Model Technology ModelSim logic simulator for VHDL simulation of
designs implemented in the Configurable System Logic (CSL) portion of a Triscend device.
- 2023-07-10 18:40:02下载
- 积分：1
