登录
首页 » VHDL » This is what I did do a UART transmitter when the source and hope for all of us.

This is what I did do a UART transmitter when the source and hope for all of us.

于 2022-03-25 发布 文件大小:3.28 kB
0 89
下载积分: 2 下载次数: 1

代码说明:

这是我做UART时候做的一个发送器的源码,希望对大家有用。-This is what I did do a UART transmitter when the source and hope for all of us.

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论


0 个回复

  • 1、ps/2键盘输入,通过led显示ascii码 2、稍等1s可以在lcd上显示输入的字符 3、其中键盘上的backspce键是用来清屏的 4、当l...
    1、ps/2键盘输入,通过led显示ascii码 2、稍等1s可以在lcd上显示输入的字符 3、其中键盘上的backspce键是用来清屏的 4、当lcd上显示满字符时,在按下按键自动清屏,从第一行显示。-1, ps/2 keyboard input, through the led display ascii code 2, wait 1s in the lcd display characters input 3, which backspce keys on the keyboard was required to settle the screen 4, when the lcd display full of characters, the press the button automatically Qing-ping, from the first line of display.
    2022-01-31 12:27:49下载
    积分:1
  • vhdl编写的简易电子中设计,经过测试成功,且用记事本上载,无需阅读器进行阅读。
    用vhdl编写的简易电子中设计,经过测试成功,且用记事本上载,无需阅读器进行阅读。-Use of VHDL in the preparation of simple electronic design, has been tested successfully, and use Notepad to upload without reader reading.
    2022-10-13 17:45:03下载
    积分:1
  • CPU
    用Verilog实现的 哈佛结构的简单指令集CPU程序,由ALU、地址译码器、指令译码器等部分组成(Part of a simple instruction Verilog realize the Harvard architecture CPU program set by the ALU, address decoder, an instruction decoder, etc.)
    2016-05-22 10:07:29下载
    积分:1
  • dianzhen
    fpga实验板上16*16点阵显示汉字的程序-翻译结果fpga实验板上16*16点阵显示汉字的程序(Experimental fpga board 16* 16 dot matrix display Chinese program- translation results fpga experimental board 16* 16 dot matrix display Chinese characters in the program)
    2013-12-24 16:28:00下载
    积分:1
  • 06042349
    Dynamic Power Management for the Iterative Decoding of Turbo Codes
    2014-04-04 15:03:28下载
    积分:1
  • hbf
    half band filter code
    2015-03-30 18:24:44下载
    积分:1
  • cordic算法的fpga的实现 采用altera芯片
    cordic算法的fpga的实现 采用altera芯片-cordic realization algorithm using fpga chip altera
    2022-05-27 15:25:07下载
    积分:1
  • counter
    说明:  基于fpga的计数器模块 分频 可移植 完美实现(Perfect realization of frequency division and portability of counter module based on FPGA)
    2020-06-20 21:00:01下载
    积分:1
  • 自适应滤波器
    由于衍射、散射、反射和稀疏等环境损伤的增加,其后果是信号视线的丧失和干扰。自适应信号处理可以克服这些缺陷。该代码是用甚高速硬件描述语言(VHDL)编写的,用以滤除高频,减少噪声和干扰。
    2023-07-04 11:00:03下载
    积分:1
  • multiply_8_VHDL
    由8 位加法器构成的以时序方式设计的8 位乘法器,采用逐项移位相加的方 法来实现相乘的VHDL程序代码。包含几个小模块和一个顶层设计文件,运行可用。(an 8 bit multiplier combined with 8 bit adder using a design by way of timing,and it use a way of Itemized shift to implement the multiply.It include some little module and a top level design document.)
    2014-04-11 16:58:04下载
    积分:1
  • 696518资源总数
  • 104817会员总数
  • 9今日下载