-
DW8051_ALL
包中包括,
DW8051完整的Verilog HDL代码
两本手册:
DesignWare Library DW8051 MacroCell, Datasheet
DesignWare DW8051 MacroCell Databook
三篇51论文:
基于IP 核的PSTN 短消息终端SoC 软硬件协同设计
Embedded TCP/ IP Chip Based on DW8051 Core
以8051为核的SOC中的万年历的设计 (DW8051 is designed by synopsys, and its instruction cycle is 4 clock, which lead to about 3 times faster than Intel 8051 with the same oscillator frequency. I writed ram, rom, some other perpherals such as DES, RNG, and its testbench, and it worked all right!)
- 2021-05-07 09:28:36下载
- 积分：1
-
Archive
TASKS OF TWO TYPES CAN BE RUN FOR EVERY 2 MIN.
- 2012-11-14 15:12:43下载
- 积分：1
-
LEDWATER
说明： LIUSHUIDENG VHDLYUYAN XIADE SHUIDENG(LEDWATER I WRITER IT MYSILF.IT'S EASY ! YOU CAN WRITER IT,TOO)
- 2017-08-31 11:17:13下载
- 积分：1
-
regress-900055
The Date prototype object is itself a Date object (its [[Class]] is "Date") whose value is NaN.
- 2013-12-27 00:29:58下载
- 积分：1
-
codes
EKG SIGNAL PROCESSING THROUGH CORDIC
- 2013-09-29 01:46:17下载
- 积分：1
-
这个程序可以帮助转换成BCD码excess3代码，完美…
this the program which can help to convert bcd code to excess3 code,the perfect circuitary has been given in this document which will lead you to understand it more properly.Reference is taken from morris mano book of digital electronics.This program can work on quatrus without any trouble.this is also used to make a final year -this is the program which can help to convert bcd code to excess3 code,the perfect circuitary has been given in this document which will lead you to understand it more properly.Reference is taken from morris mano book of digital electronics.This program can work on quatrus without any trouble.this is also used to make a final year
- 2022-03-16 21:25:25下载
- 积分：1
-
zhitouzi
原创。掷骰子游戏，VHDL，quartus，北京邮电大学数电实验，实现随机掷骰子游戏，在数码管显示点数，点阵显示输赢，有开机动画以及开机音乐，可实现多人游戏等(games, VHDL, quartus,experiments of BUPT, pure originality,random game, in the digital display dots, dot matrix display winning or losing, there are boot animation and boot music, multiplayer gaming can be achieved)
- 2020-12-24 20:49:04下载
- 积分：1
-
VHDL实现了IIS接口程序，在Quartus II 6.0上编译通过，在板子上可以读取IIS数据...
VHDL实现了IIS接口程序，在Quartus II 6.0上编译通过，在板子上可以读取IIS数据-IIS VHDL interface procedures, the Quartus II 6.0 compiled by the board can read data IIS
- 2022-01-26 02:43:55下载
- 积分：1
-
32bit_multiply
包含32为乘法器的设计，用verilog语言实现，包括booth编码的实现，booth乘法器的实现，3_2压缩器的实现，4_2压缩器的实现，华伦斯树的实现，以及两个testbench文件用于测试。(Contains 32 multiplier design, verilog language, including booth encoding implementations, booth multiplier implementations, 3_2 compressor implementation 4_2 compressor to achieve and realize China Clarence tree, and two testbench file with the to the test.)
- 2015-01-18 21:20:48下载
- 积分：1
-
电子打铃器
在max plus 2 下编译通过
电子打铃器
在max plus 2 下编译通过-electronic bell playing for the max plus 2 under through compiler
- 2022-02-20 12:08:25下载
- 积分：1
