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SDRAM的vegilog代码,做一个SDRAM的封装成为SRAM一样进行操作。一个顶层文件下由三个模块...
SDRAM的vegilog代码,做一个SDRAM的封装成为SRAM一样进行操作。一个顶层文件下由三个模块-SDRAM
- 2022-10-13 14:20:04下载
- 积分:1
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Design and Implementation of the SNMP Agents
A programming language that can decode alpha numeric
- 2018-12-06 10:15:01下载
- 积分:1
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This tutorial explains how the SDRAM chip on ltera’s DE2 Development and Educati...
This tutorial explains how the SDRAM chip on ltera’s DE2 Development and Education board can be used with a Nios II system implemented by using the Altera SOPC Builder.
- 2022-02-12 08:59:26下载
- 积分:1
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electricwatch
用VHDL语言设计多功能的电子表。实现基本电子表的时间显示、闹钟、秒表等功能(VHDL language design with multi-functional electronic watch. The time table to achieve basic electronic display, alarm clock, stopwatch functions)
- 2010-05-07 17:11:53下载
- 积分:1
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用于压缩感知。OMP 是一种算法
用于压缩感知。OMP 是一种算法
- 2023-04-30 08:30:04下载
- 积分:1
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xiangmu_chengxu
雷达基本恒虚警处理,CA-CFAR(单元平均恒虚警处理),OS-CFAR(有序类恒虚警处理),SO-CFAR(选小类恒虚警处理),(radar basic constant alarm operation,obtaining os-cfar,so-cfar,os-cfar,ca-cfar)
- 2020-12-01 20:59:28下载
- 积分:1
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Using VHDL realize CPLD (EPM240T100C5) output of the VGA screen
利用VHDL实现CPLD(EPM240T100C5)的VGA屏幕输出-Using VHDL realize CPLD (EPM240T100C5) output of the VGA screen
- 2023-04-13 10:15:04下载
- 积分:1
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基于Actel A3P030 FPGA液晶显示器使用jdl12864串行接口,时钟可调
基于Actel A3P030 FPGA,液晶采用JDL12864串行接口,时钟48MHz-Based on Actel A3P030 FPGA, LCD using JDL12864 serial interface, clock 48MHz
- 2022-07-05 03:00:11下载
- 积分:1
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sram_sp_hse_8kx8
SRAM 8K*8 芯片存储器 芯片存储器 芯片存储器(SRAM 8K*8
Chip memory
Chip memory)
- 2018-08-26 18:50:04下载
- 积分:1
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Aluno
Example of programming fifo in c
- 2013-01-17 00:23:28下载
- 积分:1