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DE2 will connect to the LCD layout for Terasic off technology companies attached...
DE2将连接到LCD布局上，为Terasic off技术公司附上系统代码
- 2023-02-16 06:25:03下载
- 积分：1
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实现dds功能，利用quartus软件，
子模块包括加法器，锁相环，date...
实现dds功能，利用quartus软件，
子模块包括加法器，锁相环，date-rom
利用原图将各模块综合，利用ps2键盘控制频率及相位。-Dds realize functions, using Quartus software, sub-modules including the adder, phase-locked loop, date-rom image to the module using integrated, using ps2 keyboard to control the frequency and phase.
- 2022-01-26 04:52:55下载
- 积分：1
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A very useful IP core resources, which includes the JTAG, MEMORY, PCI, SDRAM, an...
非常有用的IP核资源，里面包含了JTAG,MEMORY,PCI，SDRAM和USB1.1等内容，期望对大家有用-A very useful IP core resources, which includes the JTAG, MEMORY, PCI, SDRAM, and USB1.1 and other content, expectations for all of us
- 2022-03-03 12:55:22下载
- 积分：1
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GMSK
GMSK基带信号的调制解调基于SIMULINK的系统，计算误码率，(Modulation and Demodulation of GMSK Baseband Signal)
- 2019-04-18 15:33:07下载
- 积分：1
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程序
传感器是一种检测装置，能感受到被测量的信息，并能将感受到的信息，按一定规律变换成为电信号或其他所需形式的信息输出，以满足信息的传输、处理、存储、显示、记录和控制等要求(Sensor is a kind of detection device, which can sense the measured information and transform it into electrical signal or other required information output according to certain rules to meet the requirements of information transmission, processing, storage, display, recording and control.)
- 2020-06-18 22:00:01下载
- 积分：1
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demo
NiosII的C代码,包括网卡,lcd,usb,串口,按键.(NiosII C code, including network cards, lcd, usb, serial, key.)
- 2013-07-19 11:17:29下载
- 积分：1
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PID
用Verilog HDL编写的PID程序代码，成功调试，运行良好。(The source code of PID in Verilog HDL.Simulation was successful.)
- 2012-03-09 11:18:17下载
- 积分：1
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2FSK
基于FPGA的2FSK调制解调，里面有详细的工程说明，对于学习ISE软件和通信原理的知识很有帮助(FPGA based 2FSK modulation and demodulation, which contains detailed engineering instructions, for learning ISE software and communication principles of knowledge is very helpful.)
- 2018-06-30 17:49:20下载
- 积分：1
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用verilog写的4*4小键盘按键检测程序。本工程已经编译好。可以直接在Atera DE1 Fpga开发板上运行...
用verilog写的4*4小键盘按键检测程序。本工程已经编译好。可以直接在Atera DE1 Fpga开发板上运行-Written using Verilog 4* 4 keypad keys detection procedures. The project has been compiled. Directly in the development of Atera DE1 Fpga board run
- 2022-08-21 19:42:09下载
- 积分：1
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basic_cpu_mano_ise_vhdl
morris mano basic vhdl code in ise
- 2014-01-13 05:52:01下载
- 积分：1
