-
JOP kernel, which is the core of the core, the Chinese can not find basic inform...
JOP的内核文件，这是核心的核心，中文资料基本找不到-JOP kernel, which is the core of the core, the Chinese can not find basic information
- 2022-07-20 02:09:37下载
- 积分：1
-
基于SPWM自治FPGA
基于FPGA的自治型SPWM波形发生器的设计！正弦脉宽调制（SPWM）技术在以电压源逆变电路为核心的电力电子装置中有着广泛的应用，如何产生SPWM脉冲序列及其实现手段是PWM技术的关键。大家共同探讨哈！-FPGA based SPWM autonomy-based waveform generator design! Sinusoidal pulse width modulation (SPWM) technology in the voltage source inverter circuit as the core of the power electronic devices have a wide range of applications, how to generate SPWM pulse sequence and its implementation means PWM technology is the key. Kazakhstan investigate everyone!
- 2023-03-04 10:10:03下载
- 积分：1
-
电子密码锁
电子密码锁-Electronic Code Lock
- 2022-09-25 17:35:03下载
- 积分：1
-
ht66f0185-1
小家电常用芯片HT66F0185的UART 使用例子，已在产品使用(Small appliances commonly use UART chip HT66F0185 of example, has been used in products)
- 2020-10-09 16:27:34下载
- 积分：1
-
一个FPGA
一个基于FPGA的串口程序,已经经过验证,对用FPGA做串口的朋友提供参考和借鉴!-an FPGA-based serial procedures have proven, right Serial do with FPGA reference for a friend and borrow!
- 2022-03-24 10:20:25下载
- 积分：1
-
用VHDL语言设计分频器，主要是因为一些子
使用VHDL进行分频器设计，主要是一些分频的东西，整数分频，小数分频，奇次分频和偶次分频-Divider using VHDL to design, mainly because some sub-band stuff, integer divider, fractional-N, odd and even sub-sub-sub-sub-band frequency
- 2022-04-24 21:36:07下载
- 积分：1
-
对于多个子分频的Verilog代码
verilog分频器代码
分为偶数倍分频和奇数倍分频两个verilog源文件 附带一个说明文档-divider verilog code for multiple sub-divided into even and odd frequency divider several times with a two verilog source files documentation
- 2022-10-15 03:40:06下载
- 积分：1
-
VHDL language H.264 realize the opencore, meaning that documents, information su...
VHDL语言实现H.264的opencore，内涵说明文档、源码和文献等资料。 -VHDL language H.264 realize the opencore, meaning that documents, information such as source code and documentation.
- 2022-01-24 18:33:09下载
- 积分：1
-
20190718
说明： uart implementation and documentation, this describes the basic steps in building your own uart module on verilog and programming them on an fpga device
- 2020-06-21 21:40:01下载
- 积分：1
-
用VHDL语言编程完成数码管0
用VHDL语言编程完成数码管0-255数字的显示-VHDL language programming with the 0-255 number to complete the display of the digital control
- 2023-04-25 03:25:03下载
- 积分：1
