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实光电码盘的输出数据的四倍频,使码盘输出精度提高四倍。...
实光电码盘的输出数据的四倍频,使码盘输出精度提高四倍。-real photoelectric encoder output data of the four frequency, accuracy encoder output increased by four times.
- 2022-01-23 10:41:40下载
- 积分:1
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CORDIC16
16次迭代的CORDIC算法,精度很高,可应用于计算反正切值(16 iterations of the CORDIC algorithm, high accuracy, can be applied to calculate arctangent)
- 2010-06-01 15:23:27下载
- 积分:1
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USB口的设计,包括驱动程序的设计,以及软件的安装演示,软件的介绍,以及工作模式...
USB口的设计,包括驱动程序的设计,以及软件的安装演示,软件的介绍,以及工作模式-USB port design, including the driver design, and installation of software, presentation, software presentation, and working models
- 2023-02-04 17:15:08下载
- 积分:1
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xge_mac_latest.tar
Ethernet 10GE MAC 以太网10G的MAC Verilog代码实现(Ethernet 10GE MAC)
- 2010-07-31 10:04:20下载
- 积分:1
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Altera company s FPGA using VHDL to the development, use quartus2 9.0 software E...
使用altera公司的FPGA进行VHDL开发,使用quartus2 9.0 软件在EP1C3T144C8开发板上实现跑马灯输出。-Altera company s FPGA using VHDL to the development, use quartus2 9.0 software EP1C3T144C8 Development Board to achieve ticker output.
- 2022-02-02 20:51:33下载
- 积分:1
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vhdl-golden-reference-guide
vhdl golden reference guide
- 2012-12-31 03:56:13下载
- 积分:1
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verilog 写的 多功能数字钟
verilog 写的 多功能数字钟-verilog to write multi-functional digital clock
- 2023-03-18 14:30:04下载
- 积分:1
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quartus-ii-automatically-assign-pins
quartus ii 中自动分配管脚的三种方法(quartus ii automatically assign pins are three ways)
- 2012-03-31 17:12:54下载
- 积分:1
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用于压缩感知。OMP 是一种算法
用于压缩感知。OMP 是一种算法
- 2023-04-30 08:30:04下载
- 积分:1
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The_entire_FPGA_design_flow_Modelsim_Synplify
详细的说明了FPGA设计的整个流程
FPGA设计全流程Modelsim>>Synplify.Pro>>ISE(Detailed description of the FPGA design flow of the entire FPGA design flow full Modelsim> > Synplify.Pro> > ISE)
- 2009-04-06 10:12:48下载
- 积分:1