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AD_FIFO
简单的Verilog程序，针对音频实验板的AD到DA调通试验，下载执行前请按照自己试验环境更改设置(Simple Verilog program for test the AD to DA loop of universal audio test platform.
Please configure it according to the test environment before download and implement the program to FPGA)
- 2013-01-26 00:47:37下载
- 积分：1
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VHDL语言写的波形发生器和sine波形发生器
VHDL语言写的波形发生器和sine波形发生器,一共两个文件，通信开发平台专用。这是一个典型的正玄波发生器程序和一个任意波形发生器程序，大家可以参考学习，对于vhdl入门还是很有帮助的-This
is a typical wave generator Shogen procedures and an arbitrary waveform
generator procedures, Members can take a learning portal for VHDL or
helpful
- 2022-05-29 18:31:54下载
- 积分：1
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曼彻斯特编码技术用电压的变化表示0和1。规定在每个码元中间发生跳变。高→ 低的跳变表示0，低→ 高的跳变表示为1。每个码元中间都要发生跳变，接收端可将此变化提取...
曼彻斯特编码技术用电压的变化表示0和1。规定在每个码元中间发生跳变。高→ 低的跳变表示0，低→ 高的跳变表示为1。每个码元中间都要发生跳变，接收端可将此变化提取出来作为同步信号，使接收端的时钟与发送设备的时钟保持一致-Manchester coding techniques that use voltage changes in 0 and 1. Provisions in the middle of each symbol hopping happen. High → low hopping express 0, low → high jump for the express one. Symbol between each transition must happen, this change in the receiver can be extracted as a synchronization signal to the receiving end of the clock and send the equipment to maintain the same clock
- 2023-06-17 15:30:03下载
- 积分：1
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debounce
FPGA按键延时模块，产生key_value和key_flag
可直接例化调用(The key delay module of FPGA)
- 2020-06-22 04:20:02下载
- 积分：1
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rs232
基于 hdl语言的re232通信实验的设计，程序简单明了，一学就会(rs232 communication)
- 2012-03-26 21:41:47下载
- 积分：1
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Marquee with a program written in VHDL, and 60 binary counter program, one desig...
一个用VHDL编写的跑马灯程序和60进制计数器的程序，一个是自己设计的一个是老师要求，都在实验箱上验证成功，希望对大家有所帮助。-Marquee with a program written in VHDL, and 60 binary counter program, one designed by one teacher asked, are in the experimental boxes proved to be successful, want to help everyone.
- 2022-08-10 07:53:33下载
- 积分：1
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LED blinker : LED1 blink every second, LED2 blink every minute
与Xilinx spartan6评估委员会结合的小型项目示例。
- 2023-02-03 21:50:03下载
- 积分：1
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adc_cfg
adc器件ads62p49配置代码，已在工程中验证可用(Temperature sensor DS18B20 parses the code, has verified the ADC device configuration code, has been verified available)
- 2020-11-04 16:29:51下载
- 积分：1
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verilog黄金参考指南中文版
Verilog 黄金参考指南是 Verilog 硬件描述语言及其语法 语义 合并以及将它应用到硬件设计的一个简明的快速参考指南。(Verilog Golden Reference Guide is a concise and fast reference guide for Verilog Hardware Description Language and its syntax and semantics merging and its application to hardware design.)
- 2020-06-18 04:20:02下载
- 积分：1
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VerilogHdlPracticeAndSystemDesign
本RAR包括《Verilog-HDL实践与应用系统设计》一书中的全部例子，这些例子全部通过了验证。第七章以后的设计实例，不仅有Verilog-HDL的例子，也附了包括VB、VC++等源程序,甚至将DLL的生成方法也详尽地作了说明。(The RAR includes " Verilog-HDL Practice and Application of system design," a book full of examples, all passed validation. Chapter VII of the future design examples, not only examples of Verilog-HDL, but also attached, including VB, VC++ source code, etc., and even DLL generation methods explained in detail.)
- 2009-11-10 19:40:12下载
- 积分：1
