-
CodedLOCK
基于FPGA的电子密码锁设计与实现,语言是VHDL语言,有注释(FPGA-based design and implementation of electronic locks, language is VHDL language, annotated)
- 2013-08-27 21:37:06下载
- 积分:1
-
Get-20-point
this program get 20 point from user and draw functions.
- 2014-01-09 03:25:06下载
- 积分:1
-
mission
基于FPGA和Matlab的均衡滤波器设计与实现
基于MATLAB的数字均衡器的设计
采用FPGA实现基于LMS算法的自适应均衡器的设计研究
PWM控制的FPGA实现
等众多与FPGA、MATLAB相关的滤波器和均衡器设计
( FPGA and MATLAB design of filter&EQ)
- 2016-04-03 12:37:42下载
- 积分:1
-
Verilog_Ip_RAM
说明: altera ram ip教程。对RAM进行读写操作,写32个数据到RAM中,再将写入的32个数据从RAM中读出。(altera ram ip.write data to ram and read the data from the ram.)
- 2020-08-17 11:38:21下载
- 积分:1
-
Data Encryption Standard or DES
加密已经成为我们生活的一部分,我们
- 2022-04-28 04:42:22下载
- 积分:1
-
liyuanlnx_IP_RAM
FPGA——IP_RAM实验:
创建IPRAM核,单端口,10位地址线(256字节),8位数据线(每字节8byte),读写使能
input [9:0] address;
input clock;
input [7:0] data;
input wren; //置1则写入
output [7:0] q;
LNXmode:控制LEDC显示
1:mode1,从k1~k3输入data的低4位,ledb计时,从0~f,计时跳变沿读取k1~k3的值,存入RAM
8个数之后,从RAM输出数据,用leda显示,同样每秒变化一次(The experiment of FPGA-IP_RAM:
Create IPRAM core, single port, 10 bit address line (256 bytes), 8 bit data line (8 byte per byte), read and write enablement)
- 2020-06-22 04:20:02下载
- 积分:1
-
PCIe
本书共由三篇组成。其中第一篇由第1~3章组成,介绍PCI总线的基础知识。第二篇
由第4~13章组成,介绍PCIExpress总线的相关概念。第二篇的内容以第一篇为基础。(This book comprises a total of three components. The first chapter from the first 1-3 chapters, introduces the basics of the PCI bus. Second by the first 4 to 13 chapters, introduces concepts related PCIExpress bus. The contents of the first to second basis.)
- 2020-06-26 17:20:02下载
- 积分:1
-
build a music player with nios 2
build a music player with nios 2
- 2023-01-23 06:00:03下载
- 积分:1
-
seg7
SEG7数码管显示示例程序,适用于ALTERA的CPLD(SEG7 digital display sample program of ALTERA CPLD)
- 2012-05-31 10:29:25下载
- 积分:1
-
iq_balance
调整iq幅度不平衡的模块,可以解决载漏和边带问题。(Iq amplitude imbalance adjustment module can be resolved carrier and sideband leakage problems.)
- 2021-04-23 17:48:47下载
- 积分:1