-
systolic_arry
利用systolic_arry实现矩阵的乘法/求逆等操作 矩阵为4*4矩阵 所发压缩包为ISE14.6的整个开发工程。
- 2022-03-21 10:49:32下载
- 积分:1
-
verilog-2-1-4
卷积码(2,1,4)编解码的FPGA实现(Convolution code (2,1,4) decoding the FPGA implementation)
- 2020-12-27 21:09:02下载
- 积分:1
-
数字电压表程序
基于FPGA的数字电压表 两种方案 一种VHDL一种Verilog(Digital voltmeter based on FPGA)
- 2018-04-04 21:33:14下载
- 积分:1
-
FPGA设计全流程Modelsim+Synplify.Pro+ISE
说明: 介绍了FPGA的使用以及modelsim联合synplify工具的使用方法(This paper introduces the use of FPGA and the use of Modelsim joint Synplify tool)
- 2020-04-14 11:48:29下载
- 积分:1
-
xilinx-timing-constrains
ISE时序约束笔记——Global Timing Constraints,这个文档中详细介绍了如何使用ISE中约束工具和原理,对fpga水平提高有很大帮助(In this file , global timing constraints is introduced very clearly. It can really helps)
- 2012-04-16 11:08:45下载
- 积分:1
-
cic_dec_8_five
CIC抽取滤波器,抽取系数8,verilog版本,用于数字下变频(CIC decimation filter, extraction coefficient of 8, verilog version, for digital down-conversion)
- 2010-03-02 12:53:31下载
- 积分:1
-
固定长度 32 位乘法器
32 位有符号乘法 33 周期中的,它可以轻松地提高到可变延迟乘数,可以计算出这个乘数。
- 2022-07-15 11:53:06下载
- 积分:1
-
wallace_multiplier
华莱士树乘法器,运用了华莱士树状结构和布斯算法,提高了速度(The Wallace tree multiplier uses the Wallace tree structure and the Buss algorithm to increase speed)
- 2020-12-26 10:29:03下载
- 积分:1
-
tlc549adc
FPGA AD数据采集模块,实现模拟信号到数字信号转换。(FPGA AD data acquisition module, the analog signal to digital signal conversion.)
- 2021-04-14 21:08:55下载
- 积分:1
-
FloatPoint Arithmetic
Float Point Add, Multiply, and Divide arithmetic. You can change and modify the add block and reuse it in FPGA or ASIC chip. The running clock is dependent of the technology you used in the ASIC.
- 2022-06-13 03:38:57下载
- 积分:1