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source
I2C MASTER DESIGNED by Verilog
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- 积分:1
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fpga
ldpc码的FPGA编译与仿真实现,欢迎分享,分享快乐。(LDPC code compilation and simulation。)
- 2014-05-24 17:32:11下载
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FPGA中实现的硬件UDP 协议
FPGA中实现的硬件UDP 协议 FPGA中实现的硬件UDP 协议
- 2022-03-23 19:25:50下载
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xge_mac_latest.tar
Ethernet 10GE MAC 以太网10G的MAC Verilog代码实现(Ethernet 10GE MAC)
- 2010-07-31 10:04:20下载
- 积分:1
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pprobar
ES A PRACRICA 2 DEL LABORATORIO DE DIGITAL
- 2013-12-09 04:26:42下载
- 积分:1
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EDA
说明: 十进制到十六进制转换的程序。程序要求从键盘取得一个十进制数,然后把该数以十六进制的形式在屏幕上显示出来。(Decimal to hex conversion program. Procedural requirements to obtain a decimal number from the keyboard, and then the hexadecimal number to be displayed on the screen.)
- 2011-03-27 16:42:04下载
- 积分:1
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Coding Style
说明: 良好的Coding Style能减少Bug,减少锁存器出现的可能以及其他隐藏逻辑错误,也有助于减小芯片面积或所用资源(Good Coding Style can reduce Bug, reduce the possibility of latches and other hidden logic errors, and also help to reduce chip area or resources used.)
- 2020-06-17 12:00:01下载
- 积分:1
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Fpga开发应用,jtag方面的源代码,VHDL
Fpga开发应用,jtag方面的源代码,VHDL-Fpga development and application, jtag in the source code, VHDL
- 2022-04-10 02:08:59下载
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FIR低
fir低通滤波器 用于dspbuilder pll:25ns data 400khz sin 10.8khz-fir low-pass filter for dspbuilder pll: 25ns data 400khz sin 10.8khz
- 2023-05-01 00:45:03下载
- 积分:1
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ideal_6pulse
理想三相转单相 基于 spwm 的逆变器,可调(Ideal three-phase switch to a single the phase based spwm inverter)
- 2012-11-04 21:15:32下载
- 积分:1