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fpga emif verilog
接口模块,通过对高位地址的编码可实现在一个FPGA中配置四个独立的功能模块,每个功能模块具有一个
带FIFO的输出口和13个独立的可由DSP读写的寄存器,寄存器功能可自定义。模块还包含两个全局寄存器,
可实现全局复位,中断等功能。该
- 2022-02-21 22:19:00下载
- 积分:1
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xilinx pcie verilog code
用于学习和研究pcie硬件
有完整的仿真testbench及xilinx pcie softcore
- 2023-06-23 01:35:06下载
- 积分:1
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ATAN_CORDIC
使用cordic算法,基于verilog实现的atan功能,经过仿真验证,适宜工程使用。(ATAN,implemented with cordic.)
- 2018-09-26 11:19:50下载
- 积分:1
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Electronicorgan
利用VHDL编写的电子琴发生器,以简单的演奏电路论文(Electronic organ prepared using VHDL generator to perform a simple circuit Papers)
- 2009-03-06 08:52:10下载
- 积分:1
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1
说明: 基于FPGA的USB接口设计,实现了USB与FPGA的通信(USB interface to FPGA-based design, implementation of the USB communication with the FPGA)
- 2011-02-21 15:50:27下载
- 积分:1
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TW2867_ADV7171
FPGA TW2867输入到ADV7171显示实验(FPGA TW2867 input to the ADV7171 display experiment)
- 2021-03-19 15:19:19下载
- 积分:1
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emif_tt
实现dsp与fpga的emif的verilog异步实现,可实现异步读写以及相应功能模块控制,文件中包含仿真后的波形图形以及仿真测试程序,运行环境quartus ii11.0,仿真环境mmodelsim se 6.5d(Achieve dsp and fpga verilog asynchronous implementation of the emif, enabling asynchronous reading and writing as well as the corresponding function module control, the document contains graphics, and after the simulation waveform simulation testing procedures, operating environment quartus ii11.0, simulation environment mmodelsim se 6.5d)
- 2020-12-04 15:59:23下载
- 积分:1
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浮点单元
本文档介绍了Verilog双精度浮点内核,这些
- 2023-03-23 11:50:04下载
- 积分:1
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SPI_Code(Verilog)
SPI总线硬件描述语言Verilog下的实现,含主模式和从模式的实现,经过仿真验证,可作为一个单独的模块使用(SPI bus under the Verilog hardware description language to achieve with the main mode and slave mode realization, through simulation, can be used as a separate module uses)
- 2021-05-13 13:30:02下载
- 积分:1
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DE2_115_TV开发板例程,含SDRAM及异步FIFO应用
DE2_115_TV开发板例程,含SDRAM及异步FIFO应用: 通过协调器控制2入2出共4个FIFO操作SDRAM
- 2022-01-27 23:00:19下载
- 积分:1