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IIR
使用verilog语言描述的二阶巴特沃斯IIR滤波器，程序中有参数说明，已经运行通过(Using verilog language to describe the second-order Butterworth IIR filter, the program has parameter description has been run through)
- 2013-06-18 16:30:35下载
- 积分：1
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MifFileGen
VC++6.0软件生成Altera公司FPGA内部存储器ROM初始化数据mif格式文件。方便通过QuartusII导入波形等参数。强调这个是例子，生成的是一个定点的正弦数据表文件，需要用到的请自行修改源代码。(This software generates internal memory ROM initialization mif format data file for FPGA product by Altera. Facilitate the passage of the waveform parameters such as import QuartusII)
- 2013-07-19 02:32:45下载
- 积分：1
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实用的程序代码，希望对大家有用，已经调试通过
实用的程序代码，希望对大家有用，已经调试通过-Practical program code, in the hope that useful to everybody, has debugging through
- 2023-05-31 04:55:02下载
- 积分：1
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GF_2_m_域乘法器的快速设计及FPGA实现，对于rs编翼码的理解和设计有帮助...
GF_2_m_域乘法器的快速设计及FPGA实现，对于rs编翼码的理解和设计有帮助-Domain multiplier GF_2_m_ rapid design and FPGA realization for rs wing made the understanding of code and design has helped
- 2022-04-25 05:12:28下载
- 积分：1
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buffer
用verilog实现的buffer，经过了fpga平台验证。(Implement buffer with verilog.)
- 2020-10-28 12:19:58下载
- 积分：1
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deng
HDL verilog 电子密码锁 输入错误后有报警 输入正确后有提示(HDL Verilog electronic code lock input errors have prompted alarm input is correct)
- 2012-06-27 19:25:53下载
- 积分：1
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2D4N_com
2维4节点的UEL单元，嵌入UMAT，采用j2 mises屈服准则(2d4nodes uel elements, with umat codes, and j2 mises flow rule)
- 2014-06-04 20:43:21下载
- 积分：1
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4x4键盘模块。这个文件包括普通的键盘设计方案说明和相关的原程序。...
4x4键盘模块。这个文件包括普通的键盘设计方案说明和相关的原程序。-4x4 keyboard module. The documents include ordinary keyboard design program descriptions and procedures related to the original.
- 2022-01-26 02:27:17下载
- 积分：1
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Idddc_30mF
中频70M，30M带宽LFM信号，采样率为102.4M，，数字下变频后，还进行了三倍抽取，最后还得到I，Q两路信号
(IF 70M, 30M bandwidth LFM signal, the sampling rate 102.4M, under digital variable frequency after also carried out three times extracted, and finally also received the I and Q signals)
- 2012-07-25 23:56:30下载
- 积分：1
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fifo
高速FIFO，verilog设计。速度高达130Mhz(High-speed FIFO, verilog design. Speed up to 130MHz)
- 2007-08-22 10:48:45下载
- 积分：1
