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claa
vhdl code for carry lookahead addder
- 2014-02-05 00:26:26下载
- 积分：1
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quartus-ii-automatically-assign-pins
quartus ii 中自动分配管脚的三种方法(quartus ii automatically assign pins are three ways)
- 2012-03-31 17:12:54下载
- 积分：1
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全数字锁相环的verilog源代码
全数字锁相环的verilog源代码-全数字锁相环的verilog源代码
- 2023-04-30 22:20:03下载
- 积分：1
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author: Richard Herveille
-- WISHBONE revB2 compiant I2C master core
--
-- author: Richard Herveille
-- rev. 0.1 based on simple_i2c
-- rev. 0.2 april 27th 2001, fixed incomplete sensitivity list on assign_dato process (thanks to Matt Oseman)
-- rev. 0.3 may 4th 2001, fixed typo rev.0.2 txt -> txr
-- rev. 0.4 may 8th, added some remarks, fixed some sensitivity list issues--- WISHBONE revB2 compiant I2C master core---- author : Richard Herveille-- rev. 0.1 based on simple_i 2c-- rev. 0.2 adolescence 27th 2001, fixed incomplete sensitivity list on assign_d ato process (thanks to Matt Oseman)-- rev. 0.3 m ay 4th 2001, fixed typo rev.0.2 txt-
- 2022-03-20 23:45:27下载
- 积分：1
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Lcd
说明： VHDL资料 很不错的！！！！！！！！！！！(VHDL )
- 2009-08-14 22:47:46下载
- 积分：1
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Vpwm
按键可调占空比的PWM波产生程序。语言：VHDL(Button adjustable duty cycle of the PWM wave generator. Language: VHDL)
- 2013-07-30 12:30:58下载
- 积分：1
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AD
说明： 基于fpga的ad采样程序 可控制ad9226对信号进行采样(Ad9226 signal sampling can be controlled by ad9226 sampling program based on FPGA)
- 2020-12-19 17:09:10下载
- 积分：1
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I2C端口的FPGA实现，网上较多，但发现不少有问题，这个是在网上代码的基础上修改过，验证可行。...
I2C端口的FPGA实现，网上较多，但发现不少有问题，这个是在网上代码的基础上修改过，验证可行。-I2C port FPGA, online more, but found that many problems This is a code on the Internet on the basis of the revised test feasible.
- 2022-01-26 17:03:01下载
- 积分：1
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ddr3_model
一个verilog语言开发编写的简单的ddr3模型(A simple model ddr3, written with verilog language)
- 2020-08-26 17:38:13下载
- 积分：1
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VHDL source VHDL source VHDL source
VHDL源码 VHDL源码 -VHDL source VHDL source VHDL source
- 2022-01-26 18:08:58下载
- 积分：1
