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verilog.HDL.examples
许多非常有用的 Verilog 实例: ADC, FIFO, ADDER, MULTIPLIER 等(many very useful Verilog examples : ADC, FIFO, ADDER, MULTIPLIER etc.)
- 2020-06-26 04:40:02下载
- 积分：1
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m60
使用verilog实现模六十计数即0-1-2-3-4-5-.......-59-0-1-2的功能。(Use Verilog to realize the function of the mode sixty count, 0-1-2-3-4-5-....-59-0-1-2.)
- 2018-02-10 14:13:27下载
- 积分：1
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SPI
design and implement a digital system on the Altera NIOS board which will read an analogue input using MicroChip’s SPI MCP3202 12-Bit A/D converter. The 8 most significant bits of the converted data will be displayed on two seven segments of the NIOS development board. The sampling frequency is 20kHZ. Use a potentiometer.(design and implement a digital system on the Altera NIOS board which will read an analogue input using MicroChip' s SPI MCP3202 12-Bit A/D converter. The 8 most significant bits of the converted data will be displayed on two seven segments of the NIOS development board . The sampling frequency is 20kHZ. Use a potentiometer.)
- 2010-08-17 19:16:12下载
- 积分：1
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Verilog串口UART程序
网上关于RS-232的异步收发介绍得很多，最近没事学着摸索用ModelSim来做时序仿真，就结合网上的参考资料和自己的琢磨，做了这个东西。
- 2022-01-26 07:33:30下载
- 积分：1
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pinlvji
使用FPGA测量频率大小，并且在数码管上进行显示(Frequency measurement using FPGA and display on digital tube)
- 2020-06-18 10:20:02下载
- 积分：1
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sync_bitops
Set a bit and return its old value.
- 2015-06-23 14:22:31下载
- 积分：1
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yuandaima
以GPS为时间基准，实现多传感器器数据同步采集，整合信息后发送 VERILOG语言编写 QUARTUS II环境(GPS-time basis, synchronized multi-sensor data acquisition, integration of information after sending VERILOG language environment QUARTUS II)
- 2014-10-12 19:15:45下载
- 积分：1
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LaSaNewNB_M88E1111_TCP1000mhz
用FPGA，基于M88E1111芯片实现的TCP/IP协议的千兆网，将协议封装成IP核(With the FPGA, the TCP/IP protocol based on the M88E1111 chip is used to encapsulate the protocol into IP core)
- 2018-02-08 13:23:07下载
- 积分：1
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S03_基于ZYNQ的DMA与VDMA的应用开发
说明： VIVADO dma以及vdma 使用文档 基于ZYNQ 7020(vivado DMA&VDMA example text of zynq)
- 2020-06-17 11:40:02下载
- 积分：1
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802-11-Frame_E_C
Frame Control field
Retry:
Set in case of retransmission frame
More fragments:
Set when frame is followed by other fragment
Power Management
bit set when station go Power Save mode (PS)
More Data:
When set means that AP have more buffered data for a
station in Power Save mode
- 2016-08-23 17:37:40下载
- 积分：1
